Approach for low power high speed 4‐bit flash analogue to digital converter

Razavi, B.; Tavakoli, Mohammad Bagher; Setoudeh, Farbod

doi:10.1049/iet-cds.2018.5504

Cited by 3 publications

(1 citation statement)

References 28 publications

(40 reference statements)

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“…Due to their important role in modern communications, speed and power consumption in mobile equipment, analogous to digital converters, were more attracted (Razavi, Tavakoli, and Setoudeh 2020).…”

Section: Introductionmentioning

confidence: 99%

Construction of pMos Logic based Low Power High Speed Comparator Compare with nMos Logic

Reddy¹,

Dass²

2021

alinteri

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Aim: The aim of this work is to construct an innovative pMos logic based comparator and analyze the power consumption and compare with the nMos logic based comparator. Material and methods: The comparator is designed by using the Tanner tool version 16.01 for simulation and verification. By varying the length of a transistors in a circuit the power values were obtained. This experiment is performed for 20 different values of length. Results: The power consumption of a pMos logic based comparator was minimum (2.2656 ± 0.37933), followed by the nMos logic based comparator (7.7494 ± 0.41603), the less power consumption seen in pMos logic based comparator significance (.955). Conclusion: The consumption of power by the constructed pMos logic based comparator appears to have less power consumption than the nMos logic based comparator.

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Section: Introductionmentioning

confidence: 99%

Construction of pMos Logic based Low Power High Speed Comparator Compare with nMos Logic

Reddy¹,

Dass²

2021

alinteri

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CMOS Schmitt – Inverter-Based Internal Reference Comparator Array for High Temperature Flash ADC

Joseph

Hameed²

2020

IETE Journal of Research

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A Novel Rail-to-Rail Input Swing Threshold-Inverter Multi-Bit Quantizer Using Interpolation Technique for Sampled-Data Circuits

Miremadi

Hashemipour

2021

J CIRCUIT SYST COMP

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In this paper, a novel and simple multi-bit quantizer based on the threshold inverter quantization (TIQ) approach is presented for use in sampled-data circuits. The key part is a front-end signal conditioning circuit with the aid of the interpolation technique that makes it possible to realize a rail-to-rail input range operation over the conventional threshold inverter-based quantizer circuits while maintaining the benefits of the TIQ structure without employing any analog-intensive circuits such as current sources or amplifiers, thus achieving a digital-compatible implementation. Simulation results in TSMC 90-nm CMOS technology at a power-supply voltage of 1[Formula: see text]V confirm the efficient performance of the proposed circuit.

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Approach for low power high speed 4‐bit flash analogue to digital converter

Cited by 3 publications

References 28 publications

Construction of pMos Logic based Low Power High Speed Comparator Compare with nMos Logic

Construction of pMos Logic based Low Power High Speed Comparator Compare with nMos Logic

CMOS Schmitt – Inverter-Based Internal Reference Comparator Array for High Temperature Flash ADC

A Novel Rail-to-Rail Input Swing Threshold-Inverter Multi-Bit Quantizer Using Interpolation Technique for Sampled-Data Circuits

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