Application development flow for on-chip distributed architectures

Latif, Khalid; Niazi, Moazzam Fareed; Tenhunen, Hannu; Seceleanu, Tiberiu; Sezer, Sakir

doi:10.1109/socc.2008.4641503

Cited by 10 publications

(5 citation statements)

References 8 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Two real applications and three synthetic traffic traces are experimented on NoCs with different sizes. The first benchmark is a H.264 encoder (Latif, Niazi, Tenhunen, Seceleanu, &Sezer, 2008). The benchmark consumes 13 processors, and is mapped on a 5*3 mesh area.…”

Section: Methodsmentioning

confidence: 99%

“…We will analyze the effectiveness of direct latency monitoring for run-time reconfiguration, using the two real applications, a H.264 encoder (Latif et al, 2008) and a MP3 decoder application (Truscan et al, 2008). Dynamic voltage and frequency scaling (DVFS) is performed based on direct latency monitoring (Algorithm 1).…”

Section: Effectiveness Of Direct Latency Monitoring For Dvfsmentioning

confidence: 99%

See 1 more Smart Citation

Dual Monitoring Communication for Self-Aware Network-on-Chip

Plosila

Guang

Nigussie

et al. 2012

International Journal of Adaptive, Resilient and Autonomic Systems

Self Cite

View full text Add to dashboard Cite

Self-aware and adaptive Network-on-Chip (NoC) with dual monitoring networks is presented. Proper monitoring interface is an essential prerequisite to adaptive system reconfiguration in parallel on-chip computing. This work proposes a DMC (dual monitoring communication) architecture to support self-awareness on the NoC platform. One type of monitoring communication is integrated with data channel, in order to trace the run-time profile of data communication in high-speed on-chip networking. The other type is separate from the data communication, and is needed to report the run-time profile to the supervising monitor. Direct latency monitoring on mesochronous NoC is presented as a case study and is directly traced in the integrated communication with a novel latency monitoring table in each router. The latency information is reported by the separate monitoring communication to the supervising monitor, which reconfigures the system to adjust the latency, for instance by dynamic voltage and frequency scaling. With quantitative evaluation using synthetic traces and real applications, the effectiveness and efficiency of direct latency monitoring with DMC architecture is demonstrated. The area overhead of DMC architecture is estimated to be small in 65nm CMOS technology.

show abstract

Section: Methodsmentioning

confidence: 99%

Section: Effectiveness Of Direct Latency Monitoring For Dvfsmentioning

confidence: 99%

Dual Monitoring Communication for Self-Aware Network-on-Chip

Plosila

Guang

Nigussie

et al. 2012

International Journal of Adaptive, Resilient and Autonomic Systems

Self Cite

View full text Add to dashboard Cite

show abstract

“…A communication matrix is extracted from the Packet based Synchronous Data Flow (PSDF) [6] diagram and fed to the PlaceTool to generate the task allocation or placement of PEs. After having the placement of tasks and processes, the next step is scheduling, controlled by arbitration (Fig.…”

Section: Task Allocation and Schedulingmentioning

confidence: 99%

“…In this case, a two segment platform delivers the best performance; however, we decide to select a three segment platform, in order to analyze a more complex structure as explained in [6 ]. The resulting segmented application model is also visible in Fig.…”

Section: Task Allocation and Schedulingmentioning

confidence: 99%

Resource-aware task allocation and scheduling for segbus platform

Latif

Seceleanu

et al. 2010

2010 17th IEEE International Conference on Electronics, Circuits and Systems

Self Cite

View full text Add to dashboard Cite

In this work, we propose an integrated task allocation and scheduling mechanism to minimize the resource contention and the processing latency for application running on the SegBus platform. The transactions are classified as local and cross border SPLIT transactions. The hybrid scheduling approach implemented by hierarchal arbiter code structure shows significant improvement in system performance. The interrupt scheduling has been implemented to further enhance system performance. A H.264 video encoder application has been used to verify the proposed technique, showing a large improvement in system throughput.

show abstract

“…Following results of previous work [8], we have already decided on a platform structure: 3 segments, linear topology. The application has already been partitioned for this case, as depicted in Fig.…”

Section: Example Using Modeling Toolmentioning

confidence: 99%

A DSL for the SegBus platform

Niazi

Latif

Tenhunen

et al. 2009

2009 IEEE International SOC Conference (SOCC)

Self Cite

View full text Add to dashboard Cite

The paper presents a Domain Specific Language (DSL) for a multi-core segmented bus platform, SegBus. The DSL, based on a UML profile, consists of graphical platform elements in the form of stereotypes with the necessary tagged values to depict platform aspects at high level of abstraction. Customizations are applied to each stereotyped element in the form of user-defined rules to restrict relationship between platform elements. The Object Constraint Language (OCL) is employed to introduce constraints, in order to impose structural requirements between platform elements, for which we introduce mechanisms to validate them. We present a simplified example of a H.264 video encoder application where the DSL is used to specify and validate application and platform model in a unified representation manner.

show abstract

Application development flow for on-chip distributed architectures

Cited by 10 publications

References 8 publications

Dual Monitoring Communication for Self-Aware Network-on-Chip

Dual Monitoring Communication for Self-Aware Network-on-Chip

Resource-aware task allocation and scheduling for segbus platform

A DSL for the SegBus platform

Contact Info

Product

Resources

About