Antiambipolar Transistor with Double Negative Differential Transconductances for Organic Quaternary Logic Circuits

Abstract

Organic integrated circuits have emerged as potential candidates for nextgeneration computing technology because of their low-cost production, light weight, and mechanical flexibility. However, the incompatibility of organic devices with modern lithographic techniques leads to a major bottleneck, that is, low integration density. Herein, it is attempted to solve this issue by developing an organic quaternary inverter that exhibits four distinguishable logic states and thus, can significantly improve the level of device integration. The key component of the inverter is a double-peaked antiambipolar transistor (DAAT) with a double sequential negative differential transconductance characteristic. First, the DAAT is developed by employing two lateral p-n heterojunctions, namely C8-BTBT/PTCDI-C8 and C8-BTBT/PhC2-BQQDI, in which three distinct conducting paths are produced in a step-by-step manner in accordance with the increase in the gate voltage (V G ). Next, the quaternary inverter circuit is implemented by connecting the DAAT with an n-type transistor. The inverter exhibits four logic states with a complete drain voltage to ground voltage sweep. Finally, a strategy of optimizing the thickness of the PTCDI-C8 layer to improve the voltage transfer characteristics of the quaternary inverters is demonstrated. This study, thus, represents a step toward the development of high-performance organic integrated circuits.

Performance Enhancement of Organic Ternary Logic Circuits through UV Irradiation and Geometry Optimization

“…[9][10][11][12] AATs enable the fabrication of MVL circuits, including ternary and quaternary logic circuits, using only two transistors. [13][14][15][16][17][18][19][20][21][22] Moreover, the NDT characteristics of AATs enable the implementation of electrically reconfigurable logic gates, achieving multiple logic gate operations using a single "double-gated AAT" that are not obtainable in conventional p or n-type transistors. [23] Additionally, AATs with floating gate layers allow for ternary logicin-memory devices, accomplishing ternary logic and memory operation in a single device architecture.…”

Oxide Semiconductor Heterojunction Transistor with Negative Differential Transconductance for Multivalued Logic Circuits

“…Ternary logic inverters indicating three logic states are demonstrated by applying heterojunction devices. , In these heterostructure devices, a p-type semiconductor and n-type semiconductor partially form a junction, exhibiting characteristics different from conventional devices called negative differential resistance (NDR) or negative differential transconductance (NDT) . For instance, resonant tunneling diodes have been utilized in logic gate designs to increase data density and reduce power consumption in extremely high frequencies. , Heterojunction transistors (TRs) with NDT characteristics are also of great interest because three-terminal devices offer improved functionality and are easier to integrate into complex integrated circuits (ICs) than two-terminal devices. ,, The NDT phenomenon is the drain current ( I DS ) decreases and then increases again in a specific region during the gate voltage ( V GS ) sweep in their current–voltage ( I DS – V GS ) characteristics. In the NDT region, the differential transconductance, defined as g m = d I DS /d V GS , has a negative value that is not present in common n- or p-type field-effect transistors.…”

“…22,23 Heterojunction transistors (TRs) with NDT characteristics are also of great interest because three-terminal devices offer improved functionality and are easier to integrate into complex integrated circuits (ICs) than two-terminal devices. 21,24,25 The NDT phenomenon is the drain current (I DS ) decreases and then increases again in a specific region during the gate voltage (V GS ) sweep in their current−voltage (I DS −V GS ) characteristics. In the NDT region, the differential transconductance, defined as g m = dI DS /dV GS , has a negative value that is not present in common n-or p-type field-effect transistors.…”

Antiambipolar, ambipolar, and unipolar charge transport in organic transistors based on a single vertical P–N heterointerface

“…(iii) All antiambipolar phenomena are mostly observed in devices with a p-n heterointerface. 27,28 These key features of antiambipolar transport are distinctly different from those of ordinary unipolar or ambipolar devices.…”