Analyzing the impact of on-chip network traffic on program phases for CMPs

Ozisikyilmaz, Berkin; Memik, Gokhan; Kim, John; Choudhary, Alok

doi:10.1109/ispass.2009.4919653

Cited by 6 publications

(4 citation statements)

References 30 publications

(43 reference statements)

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The probability of having hotspots is then investigated through the inspection of the spatial variance of traffic injection. The work conducted in [31] registers the spatial pattern variations and uses this information to identify the different phases of an application. The phase behavior has been also investigated in [25], where the dominant communication flows are determined on a per-phase basis.…”

Section: Related Workmentioning

confidence: 99%

See 1 more Smart Citation

Multicast On-chip Traffic Analysis Targeting Manycore NoC Design

Abadal

Mestres

Martínez

et al. 2015

2015 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing

View full text Add to dashboard Cite

The scalability of Network-on-Chip (NoC) designs has become a rising concern as we enter the manycore era. Multicast support represents a particular yet relevant case within this context and has been the focus of different research efforts, mainly due to the poor performance of NoCs in the presence of this increasingly important type of traffic. However, most of the proposed schemes have been evaluated using synthetic traffic or within a full system, which is either unrealistic or costly. While traffic models would allow to better assess their performance, existing proposals do not distinguish between unicast and multicast flows and often are bound to a given number of cores. In this paper, a trace-based multicast traffic characterization is presented with the aim to provide guidelines for the modeling of multicast communications in manycore settings. To this end, the scaling trends of aspects such as the multicast traffic intensity or the spatiotemporal injection distribution are analyzed. The novelty of this work resides both on its scalability-oriented approach and on the use of correlation metrics to evaluate potential prediction opportunities.

show abstract

Section: Related Workmentioning

confidence: 99%

“…Recent literature demonstrates not only that such phases exist in applications running over sharedmemory multiprocessors, but also that the characteristics of these phases and the transitions between them are predictable [31], [35]. Phase changes affect a wide variety of metrics [36], including communication intensity [25].…”

Section: Phase Behaviormentioning

confidence: 99%

Multicast On-chip Traffic Analysis Targeting Manycore NoC Design

Abadal

Mestres

Martínez

et al. 2015

2015 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing

View full text Add to dashboard Cite

show abstract

“…On the other hand, an extremely large U yields a very small population size. Zhang et al [32] point out that clustering on a population smaller than 1000 can lead to poor clustering quality. Using these principles as a guideline, we experimentally decide U in Sec.…”

Section: Refining Sampling Parameters For Nocpointmentioning

confidence: 99%

“…Instruction counts and traffic count information can be combined to better identify execution phases of multi-threaded applications [32]. Jin et al [12] examine the characterization and clustering procedure for network traffic.…”

Section: Noclabs Vs Nocpointmentioning

confidence: 99%

Sampling-based approaches to accelerate network-on-chip simulation

Dai

Jerger

2014

2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS)

View full text Add to dashboard Cite

Abstract-Architectural complexity continues to grow as we consider the large design space of multiple cores, cache architectures, networks-on-chip (NoC) and memory controllers. Simulators are growing in complexity to reflect these system components. However, many full-system simulators fail to utilize the underlying hardware resources such as multiple cores; consequently, simulation times have grown significantly. Long turnaround times limit the range and depth of design space exploration.Communication has emerged as a first class design consideration and has led to significant research into NoCs. NoC is yet another component of the architecture that must be faithfully modeled in simulation. Here, we focus on accelerating NoC simulation through the use of sampling techniques. We propose NoCLabs and NoCPoint, two sampling methodologies utilizing statistical sampling theory and traffic phase behavior, respectively. Experimental results show that NoCLabs and NoCPoint estimate NoC performance with an average error of 7% while achieving one order of magnitude speedup. I. INTRODUCTIONAs the number of cores in contemporary processors continues to scale, the criticality of NoC design to overall performance increases accordingly. NoC designers are relying more heavily on full-system simulation to faithfully evaluate their designs. In full-system simulation, the interaction between applications and the NoC is fully exercised; the performance of new designs is accurately evaluated. Although full-system simulation enjoys the benefit of high fidelity, it suffers from prohibitively long turnaround times. Applications in full-system simulation experience up to 100,000× slow down compared to native execution [17] is an effective technique to reduce simulation turnaround times for single-, multi-threaded and multiprogrammed applications. In sampled full-system simulation, only a small but representative portion of the application is simulated in detail, the un-sampled intervals are fast forwarded. Existing work mainly focuses on evaluating micro-architecture designs, and report metrics such as CPI or application run time. To the best of our knowledge, there is no existing work exploring sampling methodologies for NoC simulation.Two major challenges exist for sampled NoC simulation 1 . First, NoC simulation focuses on different metrics compared to core simulation, so it requires a new sampling methodology.

show abstract