Analytical prediction for depth of subsurface damage in silicon wafer due to self-rotating grinding process

Zhang, Lixiang; Chen, Pei; An, Tong; Dai, Yanwei; Qin, Fei

doi:10.1016/j.cap.2019.02.015

Cited by 57 publications

(19 citation statements)

References 42 publications

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“…Wire-saw slicing R a 0.14-4.23 [6][7][8][9][10][11] 28.7-94.4 [10,11] Collapse pits [6][7][8][9]11] Fragmentation [7,8] Chipping-off [8] Scratching groove [6][7][8][9][10][11] [ [6][7][8][9][10][11] Diamond grinding R a 0.07-3.35 [12,13] N/A Grinding mark [12,14] Pitting [12,14] Crack [12,14,15] Chipping-off [16] [ [12][13][14][15][16] WEDM R a 2.31-6.3 [17][18][19][20] 0.8-22.3 [17,18,20,21] Chipping-off…”

Section: Materials Remove Rate (Mm 3 /Min) Challenges Referencementioning

confidence: 99%

“…Table 1. Comparison of methods used in processing of silicon wafers [6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21].…”

Section: Introductionmentioning

confidence: 99%

“…The preparation of semiconductor wafers involves a series of manufacturing processes, including seeding, crystal growth, slicing into wafers, grinding, chemical-mechanical polishing, electrical-chemical etching, and coating [ 1 , 2 , 3 , 4 , 5 ]. Table 1 lists the comparisons of the methods in the processing of silicon wafers [ 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 , 15 , 16 , 17 , 18 , 19 , 20 , 21 ]. The extreme hardness (~10 GPa) and strength (170 GPa) of the monocrystalline substrate materials necessitates the use of wire-saw slicing [ 6 , 7 , 8 , 9 , 10 , 11 ] and diamond grit grinding [ 12 , 13 , 14 , 15 , 16 ].…”

Section: Introductionmentioning

confidence: 99%

“…Nevertheless, cracking [ 12 , 14 , 15 ] and breakage [ 15 ] usually occur, particularly when separating the ground workpiece from the ingot. In contrast, wire electrical discharge machining (WEDM) has been shown to eliminate most contact forces, with acceptable results on the machined surface finish quality (R a 2.31–6.3 μm) [ 17 , 18 , 19 , 20 , 21 ] and appreciable material removal rates (0.8–22.3 mm 3 /min) [ 17 , 18 , 19 , 21 ].…”

Section: Introductionmentioning

confidence: 99%

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Surface Modification Using Assisting Electrodes in Wire Electrical Discharge Machining for Silicon Wafer Preparation

et al. 2021

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This paper outlines notable advances in the wire electrical discharge machining of polycrystalline silicon workpieces for wafer preparation. Our use of assisting electrodes permits the transfer of aluminum particles to the machined surface of the polycrystalline silicon workpieces, to enhance conductivity and alter surface topography regardless of the silicon’s crystallographic structure and diamond-type lattice. This in-process surface modification technique was shown to promote material removal and simultaneously preserve the integrity of the machined surfaces with preferable surface textures. In the validation experiment, the 25 mm-thick assisting electrodes deposited a notable concentration of aluminium on the machined surface (~3.87 wt %), which greatly accelerated the rate of material removal (~9.42 mg/s) with minimal surface roughness (Sa ~5.49 μm) and moderate skewness (−0.23). The parameter combination used to obtain the optimal surface roughness (Sa 2.54 μm) was as follows: open voltage (80 V), electrical resistance (1.7 Ω), pulse-on time (30 μs), and electrode thickness (15 mm). In multiple objective optimization, the preferred parameter combination (open voltage = 80 V, resistance = 1.4 Ω, pulse-on time = 60 μs, and assisting electrode thickness = 25 mm) achieved the following appreciable results: surface modification of 3.26 ± 0.61 wt %, material removal rate of 7.08 ± 2.2 mg/min, and surface roughness of Sa = 4.3 ± 1.67 μm.

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Section: Materials Remove Rate (Mm 3 /Min) Challenges Referencementioning

confidence: 99%

“…Table 1. Comparison of methods used in processing of silicon wafers [6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21].…”

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Surface Modification Using Assisting Electrodes in Wire Electrical Discharge Machining for Silicon Wafer Preparation

et al. 2021

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“…2 And in back thinning and manufacturing process of silicon wafers, the ultra-precision grinding is widely applied. 3–6 Back Grinding of Wafer with Outer Rim (BGWOR) is a new method for carrier-less thinning of silicon wafers. The working principle of BGWOR is shown in Figure 1.…”

Section: Introductionmentioning

confidence: 99%

Grinding Marks in Back Grinding of Wafer with Outer Rim

Zhu

Dong

et al. 2020

Proceedings of the Institution of Mechanical Engineers, Part C:

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Back Grinding of Wafer with Outer Rim (BGWOR) is a new method for carrier-less thinning of silicon wafers. In this paper, the simulation model of grinding marks of wafer in BGWOR was developed. With the model, the relationship between process parameters, including wheel rotational speed, wafer rotational speed, wheel infeed rate, spark out time and the protruding height of the abrasive grains in the grinding wheel, and grinding marks was discussed. Reasonable grinding parameters to control the grinding marks were also proposed. The model was verified by the experiments of BGWOR. The results showed that: (1) The pattern of the grinding marks of the wafers in BGWOR was depended on the grinding wheel rotational speed, the wafer rotational speed, the wheel infeed rate, the spark out time and the protruding height of the abrasive grains on the grinding wheel; (2) The angle between two adjacent grinding marks changes as the variation of the wheel rotational speed and wafer rotational speed; (3) The grinding marks density can be controlled by selecting the proper ratio of wheel speed to wafer speed. The depth of grinding marks can be reduced by increasing the spark out time and reducing the protruding height of the abrasive grains.

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