Analysis of VCO Phase Noise in Charge-Pump Phase-Locked Loops

Maffezzoni, P.; Levantino, Salvatore

doi:10.1109/tcsi.2012.2185312

Cited by 25 publications

(17 citation statements)

References 31 publications

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“…The macromodel parameters S W eq and S F eq can be extracted via phase-noise measurements or detailed transistor-level phasenoise simulations [16].…”

Section: B Modeling Phase Noisementioning

confidence: 99%

Analysis and Design of Weakly Coupled LC Oscillator Arrays Based on Phase-Domain Macromodels

Maffezzoni

Bahr

Zhang

et al. 2015

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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An array of weakly coupled oscillators can generate multiphase signals, i.e., multiple sinusoidal signals with specific phase separations. Multiphase oscillators are attractive solutions in many electronic applications such as the synchronization of multiple processing units in digital electronics and the frequency synthesis in mixed-signal radio frequency circuits. Due to the complexity of multiphase oscillators and the large number of design parameters, novel simulation techniques are highly desired to efficiently handle such large-scale problems. In this paper, an efficient phase-domain simulation technique is proposed to calculate the phase response of inductance capacitance oscillator array. By some practical examples, it is shown how the proposed method can be exploited to identify the array topologies and parameter settings that guarantee stable phase separations. It is also shown how the proposed technique can be used to evaluate phase-noise performance

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“…The macromodel parameters S W eq and S F eq can be extracted via phase-noise measurements or detailed transistor-level phasenoise simulations [16].…”

Section: B Modeling Phase Noisementioning

confidence: 99%

Analysis and Design of Weakly Coupled LC Oscillator Arrays Based on Phase-Domain Macromodels

Maffezzoni

Bahr

Zhang

et al. 2015

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Self Cite

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“…8 we show the PLL's phase noise from devicenoise time-domain simulations on the transistor level, obtained through the steps listed in Sec. III-C, and on the macromodel by computing the PSD on (16). Simulation results match well from 200KHz to 200MHz (a maximum error of 4dB in this band).…”

Section: A N = 25mentioning

confidence: 66%

“…Hereafter, we list a few works. In [16], the authors present an approach for phase noise behavioral simulation of charge pump-PLLs at steady state. They provide closed-form expressions for PLL blocks' noise transfer functions to extract the phase noise spectrum.…”

Section: Problem Formulationmentioning

confidence: 99%

“…Fig. 9 plots the phase noise from the SST noise and from the PSD on the macromodel's ∆θ P LLout (t) in (16), interpolated as a post-processing routine, to appreciate the phase noise's tail. We can see that results match very well up to 500MHz; instead, the phase noise's tail obtained from the time-domain simulation on the transistor level seems to be more accurate than the macromodel, compared with the SST noise (Fig.…”

Section: A N = 25mentioning

confidence: 99%

“…14 we plot the phase noise shapes obtained with the steps in Sec. III-C on the transistor level and on the interpolated ∆θ P LLout (t) by computing the PSD on (16). Because of possible inaccuracies due to the first two post-processing steps in obtaining the transistor-level's phase noise, we also show the phase noise from an SST noise on the transistor-level PLL (SSTN): we can note this last curve lies in between the first two, thus statistically reducing the discrepancy between the results obtained with the macromodel and transistor-level time-domain simulations, which stays below 7dB.…”

Section: B N = 50mentioning

confidence: 99%

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Fast and Accurate Time-Domain Simulations of Integer-N PLLs

Luca

Bolcato

Larcheveque

et al. 2017

IEEE Trans. Circuits Syst. I

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Abstract-We present a methodology to simulate industrial integer-N phase-locked loops (PLLs) at a verification level, as accurate as and faster than transistor-level simulation. The accuracy is measured on the PLL factors of interest, i.e., locking time, power consumption, phase noise and jitter (period and long-term). The speedup factor tends to the division ratio N for device-noise simulations. We develop a unifying technique which is able to deal with both noise-free and device-noise analyses, taking into account nonlinear and second-order effects visible at transistor-level simulation only, whereas previous works focused on one of the two analyses, separately. The procedure is based on oscillator's sensitivity analysis and on the creation of a phase macromodel for the voltage-controlled oscillator (VCO) together with the loop divider (the phase model is called VCODIV), whilst the other PLL's blocks remain at transistor level. The macromodel's phase law is characterized by a piecewise linear curve, representing the sensitivity of the VCODIV output's phase deviation with respect to the voltage variation of the VCO's control pin, and by the effects of all the VCO's and divider's noise sources on the model's output. We show two experiments on industrial PLLs, and provide guidelines for designers which highlight the steps needed to implement the methodology by using well-known analyses in circuit simulation and Verilog-A for the creation of the macromodel.

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Survey of integrated‐circuit‐oscillator phase‐noise analysis

Pankratz

Sánchez-Sinencio

2013

Circuit Theory & Apps

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This tutorial distills the salient phase-noise analysis concepts and key equations developed over the last 75 years relevant to integrated circuit oscillators. Oscillator phase and amplitude fluctuations have been studied since at least 1938 when Berstein solved the Fokker-Planck equations for the phase/amplitude distributions of a resonant oscillator.The principal contribution of this work is the organized, unified presentation of eclectic phase-noise analysis techniques, facilitating their application to integrated circuit oscillator design. Furthermore, we demonstrate that all these methods boil down to obtaining three things: (1) noise modulation function; (2) noise transfer function; and (3) current-controlled oscillator gain. For each method, this paper provides a short background explanation of the technique, a step-by-step procedure of how to apply the method to hand calculation/computer simulation, and a worked example to demonstrate how to analyze a practical oscillator circuit with that method.This survey article chiefly deals with phase-noise analysis methods, so to restrict its scope, we limit our discussion to the following: (1) analyzing integrated circuit metal-oxide-semiconductor/bipolar junction transistor-based LC, delay, and ring oscillator topologies; (2) considering a few oscillator harmonics in our analysis; (3) analyzing thermal/flicker intrinsic device-noise sources rather than environmental/parametric noise/ wander; (4) providing mainly qualitative amplitude-noise discussions; and (5) omitting measurement methods/phase-noise reduction techniques.We categorize oscillators into one of three varieties, as illustrated in Figure 3: resonant, delay line, or relaxation. First, the resonant oscillator consists of a nonlinear amplifier and a lumped frequencyselective network or resonator, which typically has a band-pass frequency response with a single magnitude peak as indicated conceptually in the figure. This resonator can take the form of an LC tank circuit, dielectric puck, quartz crystal, SAW or bulk acoustic wave transducer, yttrium iron garnet resonator, or ceramic disk resonator to name a few [43,147,148]. IC resonant oscillators typically use LC tanks, although they are often designed to work in concert with an external 874 E. PANKRATZ AND E. SÁNCHEZ-SINENCIO ! ss t ð Þ correspond to the roughly circular trajectory in the figure called a limit cycle [150].Figure 4. Optoelectronic delay-line oscillator. 876 E. PANKRATZ AND E. SÁNCHEZ-SINENCIO For some subtleties of amplitude-noise behavior, see [50,143], where [50] also points out effects of not employing Floquet normalization (cf. Section 4.7).½ =fVoigt ð Þ 2(Gaussian) at small offsets [78,151,152,154]. Chorti also observed that, in general, noise processes with long correlation times tend to create such 'Gaussian' voltage spectra for small frequency offsets f m [151,152]. 4 Note well that, technically, defining spectra for f proves problematic, as it is not stationary and, what is worse, not bounded. This is in fact one reason why the ...

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Analysis of VCO Phase Noise in Charge-Pump Phase-Locked Loops

Cited by 25 publications

References 31 publications

Analysis and Design of Weakly Coupled LC Oscillator Arrays Based on Phase-Domain Macromodels

Analysis and Design of Weakly Coupled LC Oscillator Arrays Based on Phase-Domain Macromodels

Fast and Accurate Time-Domain Simulations of Integer-N PLLs

Survey of integrated‐circuit‐oscillator phase‐noise analysis

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