2015
DOI: 10.1016/j.ijepes.2014.10.034
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Analysis of cascaded multilevel inverters for active harmonic filtering in distribution networks

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Cited by 42 publications
(20 citation statements)
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“…However, the capacitor design deals with the power factor constraint. The filter design constraint in Equation (16) limits the size of the capacitor. 10f g << f res << 0.5f s (15)…”
Section: Lcl Filter Designmentioning
confidence: 99%
“…However, the capacitor design deals with the power factor constraint. The filter design constraint in Equation (16) limits the size of the capacitor. 10f g << f res << 0.5f s (15)…”
Section: Lcl Filter Designmentioning
confidence: 99%
“…However, multi‐level inverter (MLI) operates with lesser switching frequency, and the harmonic elimination capability is quite high compared with these two level inverters. So, MLIs are preferable to operate as a SAF and extend effective performance in high power applications . so it has been commonly recognized by researchers and industrialists.…”
Section: Introductionmentioning
confidence: 99%
“…Various multilevel inverters configurations are proposed and used in the harmonics elimination and reactive power compensation, such as the multilevel Cascade H-bridge Inverter [11][12][13][14], Flying Capacitor Multilevel Inverter [15][16][17], and the multilevel neutral-point-clamped (NPC) Inverter [18][19][20][21][22][23]. The NPC inverters are the most widely used topology and successfully employed in medium and high power applications in the harmonics elimination and reactive power compensation for electrical networks [18].…”
Section: Introductionmentioning
confidence: 99%
“…Some other works use a conventional three-level three dimensional space vector modulation strategy (C3L-3DSVM) for a fourleg NPC inverter [29][30][31][32], this strategy have been widely used in generation of gate switching pulses for three-level four leg NPC inverter based SAPF and DSTATCOM, as this strategy can fixed switching frequency, reduce commutation losses and harmonic contents of output voltage [14,15], and can obtain higher amplitude modulation indexes and high quality of output SAPF voltages waveforms. The drawback of these strategies is the unbalance of dc bus voltage capacitors for three-level four leg NPC inverters, this unbalanced is affected the loading of certain capacitor and unloading the other capacitor and causing harmful effects, such as the inverter output voltages distorted and from deteriorating any further in the level of inverter is increase, because of the proliferation midpoints between the capacitors.…”
Section: Introductionmentioning
confidence: 99%
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