Analysis and Optimization of Switched-Capacitor DC-DC Converters

Changming

Analog Integr Circ Sig Process

et al. 2012

This paper presents a new method to improve light load efficiency and minimize output ripple of switched-capacitor (SC) DC/DC converters. In order to improve light load efficiency, this paper proposes adaptive frequency modulation to scale down gate-drive losses as load current reduces. Adaptive duty cycle modulation is proposed to minimize output ripple as the converter works under different gain hopping mode. Furthermore, this work optimized switching frequency, the dead time of 2-phase non-overlapping clocks and switching transistor size for efficiency enhancement. A new compensation circuit is also proposed to make system stable. A transistor level implementation of the proposed SC converter in Chartered 0.35 lm CMOS process is provided. Measurement results shows: maximum ripple voltage is\8 mV and efficiency is up to 87%.

“…Slow-Switching loss derives from dynamic voltage variation on flying capacitors, especially when the switching frequency is low [11]. The equivalent output impedance will be analyzed.…”

Section: Slow-switching Lossmentioning

confidence: 99%

A novel high efficiency low ripple switched-capacitor DC/DC converter

Changming

Analog Integr Circ Sig Process

et al. 2012

Analog Integr Circ Sig Process

“…Last couple of years the fundamental work of these pioneers converged into the work in [4]. These models were conceived based on the assumption that capacitive DC-DC converters have an infinitely large output buffer capacitance.…”

Section: Introductionmentioning

confidence: 99%

Accuracy improvement of the output impedance model for capacitive down-converters

Breussegem¹,

Steyaert²

2012

Contemporary models fail to include the influence of the output buffer capacitor size on the performance of capacitive DC-DC converters. This letter examines the relevance of this dependency and shows how to adapt existing models in order to include it. The improved model is verified mathematically for down-converters, by means of Spice simulations and based on measurements of silicon integrated prototypes. Measurements demonstrate an accuracy improvement of up to 30 % compared with the conventional model.

“…Compare to the Dickson charge pump, Fibonacci topology can generate the same gain with fewer stages. Detailed analysis of Fibonacci topology can be found in depth in references [7,26,27]. The three stage Fibonacci charge pump is shown in Figure 3.12.…”

Section: Fibonacci Topologymentioning

confidence: 99%

“…In phase two, the capacitors are connected in series with each other and the input source to deliver charge to the output capacitor [7]. The one stage step down series-parallel converter is shown in Figure 3.10.…”

Section: Series-parallel Structurementioning

confidence: 99%

See 1 more Smart Citation

Energy Harvesting System Modeling

Pathiranage

Master of Science Energy Harvesting System Modelingby Walive Pathiranage Manula Randhika Pathirana DC-DC converters are electrical circuits that transfer energy from a DC voltage source to a load and regulate the output voltage. These circuits are widely used in energy harvesting applications, and should be optimized based on input power and load requirements to have maximum converter efficiency. SPICE is one of the popular tools used for this purpose which requires the user to design a circuit in the tool and perform the optimization. This requires a significant amount of time of the user at the design stage. This thesis develops a tool based on MATLAB Simulink to carry out the preliminary analysis of a power management circuits in an energy harvesting system.The tool consists of models on two inductor based DC-DC converters, linear dropout regulator (LDO) and five different non inductor based DC-DC converters. Individual models were verified in SPICE using 130 nm CMOS technology. The model is further developed to make a unified global energy harvesting model for inductor based and non inductor based DC-DC converters. The usage of a unified model for energy harvesting systems is presented in detail using three experiments. The tool can accurately model the functionality, energy and efficiency of the functional components of energy scavenging systems. This modeling can be used to make architectural design decisions in a power management unit in system-on-chip applications.