Analogue circuit building blocks with amorphous silicon thin film transistors

Sambandan, Sanjiv; Kumar, Aditya; Sakariya, K.; Nathan, Arokia

doi:10.1049/el:20057573

Cited by 17 publications

(10 citation statements)

References 4 publications

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“…The present paper characterizes the lowfrequency behavior (ignoring parasitic capacitances) of basic building blocks in analog circuits with n-type enhancement a-GIZO TFTs. A subtractor and adder circuits from [13] are used as testbed, as well as a basic current-mirror.…”

Section: Introductionmentioning

confidence: 99%

Basic analog circuits with a-GIZO thin-film transistors: Modeling and simulation

Bahubalindruni

Tavares

Barquinha

et al. 2012

2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD

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This paper addresses a modeling and simulation methodology for analog circuit design with amorphous-GIZO thin-film transistors (TFTs). To reach an effective circuit design flow, with commercially available tools, a TFT model has been first developed with an artificial neural network (ANN). Multilayer perceptron with backpropagation algorithm has been adopted to model the static behavior of the TFT devices, for different aspect ratios. The model was then implemented in Verilog-A, to allow a quick instantiation in circuit. Simulations using Cadence Spectre are performed to validate the model. On a second phase, simulation results of basic analog circuits, with this ANN model, are verified against the actual functional results, namely an adder, subtractor, and current mirror circuit. Results demonstrate not only the ANN model accuracy and compatibility with dc and transient analysis, but also show the a-GIZO TFT capability to perform analog operations.

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Section: Introductionmentioning

confidence: 99%

Basic analog circuits with a-GIZO thin-film transistors: Modeling and simulation

Bahubalindruni

Tavares

Barquinha

et al. 2012

2012 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD

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“…4(d) shows the output voltage variation with time for an NMOS load. If both the load and the driver are NMOS (or non-complementary) the effects of the V T shift on the output voltage drift are shown to be minimized, particularly if both the transistors are in saturation [13]. In Fig.…”

Section: Testcases For Validating the Developed Simulatormentioning

confidence: 98%

Large area flexible electronics for analog mode continuous time applications

Raghuraman

Sambandan

Yadav

2015

2015 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT)

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Conventionally, the applications of non-crystalline semiconductor based Thin Film Transistors (TFTs) are confined to large area display applications. Typically they are used in the driver circuits of pixel arrays. One of the fundamental characteristics of such TFTs is the drift in the threshold voltage V T on application of gate bias. This paper presents a novel circuit simulator based on the recursive model of V T shift and shows how the simulator can be used to explore novel analog mode continuous time applications of TFTs based on sensor actuator architectures. While operating in analog mode, V T shift causes the DC operating point of the circuit to vary. Using this circuit simulator, the concept of employing negative feedback to minimize the drain current variation in circuits made of TFTs is studied. The ideas are validated by fabricating p-type Copper phthalocyanine (CuPC) TFTs and testing the circuits.

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“…Such a concept can effectively be applied to single stage amplifiers to enhance the gain, up to values of the order of magnitude of the transistor intrinsic gain, and forms the bases for the proposed double bootstrapping technology. Then, this paper focuses on the design of analog blocks [14], [15] that are useful for high-gain stages, which can also function as buffer, adder and subtractor. All these functional blocks are important for data driver circuits in TFT LCD panels.…”

Section: Introductionmentioning

confidence: 99%

Analog Circuits With High-Gain Topologies Using a-GIZO TFTs on Glass

Bahubalindruni

Silva

Tavares

et al. 2015

J. Display Technol.

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This paper presents analog building blocks that find potential applications in display panels. A buffer (source-follower), subtractor, adder, and high-gain amplifier, employing only n-type enhancement amorphous gallium-indium-zinc-oxide thin-film transistors (a-GIZO TFTs), were designed, simulated, fabricated, and characterized. Circuit simulations were carried out using a neural model developed in-house from the measured characteristics of the transistors. The adder-subtractor circuit presents a power consumption of 0.26 mW, and the amplifier presents a gain of 34 dB and a power consumption of 0.576 mW, with a load of 10 M pF. To the authors' knowledge, this is the highest gain reported so far for a single-stage amplifier with a-GIZO TFT technology.

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Analogue circuit building blocks with amorphous silicon thin film transistors

Cited by 17 publications

References 4 publications

Basic analog circuits with a-GIZO thin-film transistors: Modeling and simulation

Basic analog circuits with a-GIZO thin-film transistors: Modeling and simulation

Large area flexible electronics for analog mode continuous time applications

Analog Circuits With High-Gain Topologies Using a-GIZO TFTs on Glass

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