Analog VLSI Circuits for Competitive Learning Networks

Card, H.C.; McNeill, D.K.; Schneider, C.

doi:10.1007/978-1-4757-4730-0_6

Cited by 5 publications

(10 citation statements)

References 71 publications

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“…Very large scale integration (VLSI) implementations of competitive-learning synapses have been reported in the literature [10]- [13]. These synapses typically use digital or capacitive weight storage.…”

Section: Introductionmentioning

confidence: 99%

Competitive learning with floating-gate circuits

Hsu

Figueroa

Diorio

2002

IEEE Trans. Neural Netw.

326

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Competitive learning is a general technique for training clustering and classification networks. We have developed an 11-transistor silicon circuit, that we term an automaximizing bump circuit, that uses silicon physics to naturally implement a similarity computation, local adaptation, simultaneous adaptation and computation and nonvolatile storage. This circuit is an ideal building block for constructing competitive-learning networks. We illustrate the adaptive nature of the automaximizing bump in two ways. First, we demonstrate a silicon competitive-learning circuit that clusters one-dimensional (1-D) data. We then illustrate a general architecture based on the automaximizing bump circuit; we show the effectiveness of this architecture, via software simulation, on a general clustering task. We corroborate our analysis with experimental data from circuits fabricated in a 0.35-mum CMOS process.

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Section: Introductionmentioning

confidence: 99%

Competitive learning with floating-gate circuits

Hsu

Figueroa

Diorio

2002

IEEE Trans. Neural Netw.

326

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“…This allows for omitting the square root operation, which contributes to the simplification of the circuit. The winning th neuron adapts its weight vector in the following way: (8) The weights associated with other neurons remain unchanged (9) The initial value of has been selected experimentally. The value of this parameter decreases during the learning process.…”

Section: Implementation Of the Proposed Conscience Mechanismmentioning

confidence: 99%

“…Another reason is a common opinion that commercial digital processors are fast enough to realize neural networks thus reducing the usefulness of any specialized hardware implementation. Consequently, the research on this topic has been slowed down, resulting in a situation, in which the main hardware implementations of neural networks are those reported many years ago [1]- [9].…”

mentioning

confidence: 99%

Realization of the Conscience Mechanism in CMOS Implementation of Winner-Takes-All Self-Organizing Neural Networks

Długosz

Talaśka

Pedrycz

et al. 2010

IEEE Trans. Neural Netw.

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This paper presents a complementary metal-oxide-semiconductor (CMOS) implementation of a conscience mechanism used to improve the effectiveness of learning in the winner-takes-all (WTA) artificial neural networks (ANNs) realized at the transistor level. This mechanism makes it possible to eliminate the effect of the so-called ¿dead neurons,¿ which do not take part in the learning phase competition. These neurons usually have a detrimental effect on the network performance, increasing the quantization error. The proposed mechanism comes as part of the analog implementation of the WTA neural networks (NNs) designed for applications to ultralow power portable diagnostic devices for online analysis of ECG biomedical signals. The study presents Matlab simulations of the network's model, discusses postlayout circuit level simulations and includes results of measurement completed for the physical realization of the circuit.

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“…Other alternatives for lowering the CL training time are based on analog circuits [5,16]. The analog architectures consume low hardware resources while having a high computational speed.…”

Section: Related Workmentioning

confidence: 99%

“…The design is beneficial for applications where lower power consumption and high mobility are the important concerns. Typical examples include the CL-based vector quantization (VQ) [5,27] for real-time image/video compression in portable devices, CL-based color image segmentation for real-time computer vision [25], and learning-based data reduction [23] for wireless sensor networks.…”

Section: Introductionmentioning

confidence: 99%