Competitive learning with floating-gate circuits

Abstract

Competitive learning is a general technique for training clustering and classification networks. We have developed an 11-transistor silicon circuit, that we term an automaximizing bump circuit, that uses silicon physics to naturally implement a similarity computation, local adaptation, simultaneous adaptation and computation and nonvolatile storage. This circuit is an ideal building block for constructing competitive-learning networks. We illustrate the adaptive nature of the automaximizing bump in two ways. First, we demonstrate a silicon competitive-learning circuit that clusters one-dimensional (1-D) data. We then illustrate a general architecture based on the automaximizing bump circuit; we show the effectiveness of this architecture, via software simulation, on a general clustering task. We corroborate our analysis with experimental data from circuits fabricated in a 0.35-mum CMOS process.

Redesigning commercial floating-gate memory for analog computing applications

“…The so-called synaptic transistors and similar devices [4,5,[8][9][10][11][12][13][14][15][16][17]19] (see also reviews [18,7]) is the most commonly reported implementation of this idea. This technique is very convenient due to its compatibility with the generic CMOS fabrication process.…”

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Security authentication using phase-encoded nanoparticle structures and polarized light

“…The final class of the sample is the one with the largest number of votes. For further details, the reader is referred to [23].…”