2018
DOI: 10.1109/jetcas.2017.2765892
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Analog Spike-Timing-Dependent Resistive Crossbar Design for Brain Inspired Computing

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Cited by 18 publications
(8 citation statements)
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“…In this paper, the STDP principle is applied to build an ISI spike decoder that could significantly improve the performance of the design in [9][10][11][12], i.e. the working frequency could be much higher than 100KHz.…”
Section: Isi Decoding Methodologymentioning
confidence: 99%
See 2 more Smart Citations
“…In this paper, the STDP principle is applied to build an ISI spike decoder that could significantly improve the performance of the design in [9][10][11][12], i.e. the working frequency could be much higher than 100KHz.…”
Section: Isi Decoding Methodologymentioning
confidence: 99%
“…spike rate code, spike latency code, to serve as information carrier in their designs [7,8]. For the spike-based ISI encoding technique, two types of the analog ISI encoder and one high sampling rate decoder are introduced in [6] [9]. However, among these implementations, there are many unsolved problems that need to be seriously considered, which are high error rate, low noise immunity, low speed limitation, limited scaling up capability, low reliability, and high power consumption.…”
Section: Fig 1 Spike Processing Schemesmentioning
confidence: 99%
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“…In recent years, an increasing number of researchers have started to implement neuromorphic computing using analog integrated circuits [46,47,49,50,71,[73][74][75][76][77][78][79]. Compared to digital implementation, analog implementation of neuromorphic computing is more energy efficient.…”
Section: Recent Progress In Neuromorphic Computingmentioning
confidence: 99%
“…TrueNorth chip consumes only 70 milliWatts (mW) to run 1 million spiking neurons with 256 million synapses [13][14][15]. The energy efficiency of spiking neural networks (SNNs) makes them a suitable choice for hardware implementations of artificial neurons as well [16,17].…”
Section: Introductionmentioning
confidence: 99%