An up to 36Gbps analog baseband equalizer and demodulator for mm-wave wireless communication in 28nm CMOS

Comparator hysteresis compensation for decision feedback equalisers

“…A hardware implementation of the proposed technique has been demonstrated in a 18/36 Gbit/s QPSK/16‐QAM 5‐tap DFE fabricated in 28 nm CMOS for mmWave wireless communication. After down‐conversion on a homodyne RX, the signal is presented as two I/Q components each containing a NRZ/4‐PAM signal [3]. In this design each comparator had a hysteresis of about 10% of the maximum eye level, due to kickback of the CML slave latch and therefore independent of frequency.…”

“…Only offset compensation was not enough to receive error‐free LSBs on the 16QAM mode due to limited bandwidth of the PRBS generator at the maximum speed. The same measurement was repeated with the same first tap setting but at lower clock speeds of 4 and 1 GHz, to avoid this bandwidth limitation, and including different channel CIRs [3].…”

“…After down-conversion on a homodyne RX, the signal is presented as two I/Q components each containing a NRZ/4-PAM signal [3]. In this design each comparator had a hysteresis of about 10% of the maximum eye level, due to kickback of the CML slave latch and therefore independent of frequency.…”