An ultra low-voltage rail-to-rail comparator for on-chip energy harvesters

Nagy, Lukáš; Stopjaková, Viera; Arbet, Daniel; Potocny, Miroslav; Kovac, Martin

doi:10.1016/j.aeue.2019.05.040

Cited by 16 publications

(7 citation statements)

References 12 publications

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“…A load of 33nF is chosenin consistency with previously used in the literature for this type of application [3]. The insulation resistance of is chosen based on a previous work [9].…”

Section: Charge Pump Designmentioning

confidence: 99%

Analysis and Design of a Self-Powered VEH System Based on ULP Comparator

Holguin

Prócel

Brenes

et al. 2023

2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS)

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The study conducted shows a vibrational energy harvester (VEH) based on a microelectromechanical system (MEMS) with a gap-closing electrostatic resonator. The harvester system consists of a charge pump system in the form of a rectifier with feedback. An ultra-low power (ULP) comparator, based on a bulk driven topology, is connected to it, which regulates the harvesting cycle of the system. The complete circuit is implemented with 180 nm silicon technology. The designed energy harvester generates an output power of 65.45 nW at an acceleration of 0.35 for a frequency of 53.5Hz. The implemented circuit is supplied with a voltage of one volt and shows a power consumption of about 7nW at the operating range. All simulations were conducted using Cadence Virtuoso.

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“…A load of 33nF is chosenin consistency with previously used in the literature for this type of application [3]. The insulation resistance of is chosen based on a previous work [9].…”

Section: Charge Pump Designmentioning

confidence: 99%

Analysis and Design of a Self-Powered VEH System Based on ULP Comparator

Holguin

Prócel

Brenes

et al. 2023

2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS)

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“…Furthermore, it has a limited common-mode range which is important for many applications like successive approximation register analog to digital converters (SAR ADCs) [2]. A rail-to-rail operation is achieved by applying a bulk-driven technique at the expense of low energy efficiency [3]. Standard digital cells are merged in [4] to form a railto-rail comparator.…”

Section: Introductionmentioning

confidence: 99%

A rail‐to‐rail regenerative comparator with inverse inverter pre‐amplifier for low supply voltage applications

Pahlavanzadeh,

Iesakhani,

Karami

2023

Electronics Letters

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In this letter, a new rail‐to‐rail two‐stage regenerative comparator for low supply voltage applications is presented. A rail‐to‐rail operation is achieved by utilizing an inverse inverter pre‐amplifier. The proposed comparator is post‐layout simulated within a standard 180‐nm CMOS technology. In the worst‐case scenario, the energy efficiency and the delay of the comparator are improved by more than 80% compared to the conventional single‐stage comparator.

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“…The model created for purposes of circuit simulations has been calibrated for weak and moderate inversion levels with precise modeling of V T H shift due to body-effect, as well as, forward-biasing of source-bulk diode within a safe voltage range, to avoid triggering the latch-up [7], [8]. The bulk-driven (BD) design approach is employing the MOS transistor's bulk voltage to control its parameters and there has been published several papers discussing silicon-proven bulk-driven analog IC designs [9]- [11]. The results presented in this paper are directly linked to [12], which describes the development of EKV model for bulk-driven applications and a novel extraction sequence focused on bulk-driven transistors.…”

Section: Introductionmentioning

confidence: 99%

EKV Model for Bulk-Driven Circuit Design Using g_mb/I_D Method

et al. 2021

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The paper addresses a development and application of EKV MOS transistor compact model with focus on the ultra low-voltage / ultra low-power analog integrated circuit (IC) design employing bulk-driven (BD) technique. The presented contribution can be viewed as an extension of standard EKV model application and as a contribution to ultra low-voltage IC design techniques. The paper compares the measured and extracted small-signal parameters of standalone transistor samples fabricated in 130 nm CMOS technology and the simulation results obtained using the proposed bulk-driven EKV v2.63 model and foundry-provided BSIM model v3.3. The transistor samples were analyzed with power supply of VDD = 0.4 V The paper also discusses the implementation of 3D graphs as a result of introducing another degree of freedom into the essential MOS transistor characteristics, while maintaining the ease of using the design hand-calculation with the original gm/ID approach.

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An ultra low-voltage rail-to-rail comparator for on-chip energy harvesters

Cited by 16 publications

References 12 publications

Analysis and Design of a Self-Powered VEH System Based on ULP Comparator

Analysis and Design of a Self-Powered VEH System Based on ULP Comparator

A rail‐to‐rail regenerative comparator with inverse inverter pre‐amplifier for low supply voltage applications

EKV Model for Bulk-Driven Circuit Design Using g_mb/I_D Method

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An ultra low-voltage rail-to-rail comparator for on-chip energy harvesters

Cited by 16 publications

References 12 publications

Analysis and Design of a Self-Powered VEH System Based on ULP Comparator

Analysis and Design of a Self-Powered VEH System Based on ULP Comparator

A rail‐to‐rail regenerative comparator with inverse inverter pre‐amplifier for low supply voltage applications

EKV Model for Bulk-Driven Circuit Design Using gmb/ID Method

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Product

Resources

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EKV Model for Bulk-Driven Circuit Design Using g_mb/I_D Method