2016 24th Iranian Conference on Electrical Engineering (ICEE) 2016
DOI: 10.1109/iraniancee.2016.7585677
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An ultra-low-power TIA plus limiting amplifier in 90nm CMOS technology for 2.5 Gb/s optical receiver

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Cited by 4 publications
(4 citation statements)
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“…In the optical communication systems, a transimpedance amplifier (TIA) [8], which converts currents of a photodiode to voltage signals and amplifies it to drive following circuits, is the most essential circuit for the frequency bandwidth of the optical receiver [9,10,11], but to achieve high-performance transimpedance, TIAs require large power consumption [12]. A low power TIA is also being actively investigated [13,14]. This paper proposed a new circuit topology for bandwidth enhancement with low-power consumption based on a current-reuse regulated-cascode (CR-RGC) TIA.…”
Section: Introductionmentioning
confidence: 99%
“…In the optical communication systems, a transimpedance amplifier (TIA) [8], which converts currents of a photodiode to voltage signals and amplifies it to drive following circuits, is the most essential circuit for the frequency bandwidth of the optical receiver [9,10,11], but to achieve high-performance transimpedance, TIAs require large power consumption [12]. A low power TIA is also being actively investigated [13,14]. This paper proposed a new circuit topology for bandwidth enhancement with low-power consumption based on a current-reuse regulated-cascode (CR-RGC) TIA.…”
Section: Introductionmentioning
confidence: 99%
“…Recently, many efforts have been made on the CMOS optical receiver design for high‐speed optical interconnects. These achievements were based on small scale of CMOS technologies which are very expensive [4] or utilised a passive inductor peaking technique which consumes very large chip area or employed an active inductor peaking technique which needs high power supply voltage [5–8]. This work presents the design of a 30 Gb/s optical integrated receiver array in a 0.13 μm CMOS technology.…”
Section: Introductionmentioning
confidence: 99%
“…In order to ensure low power consumption and small size, the receiver employs an RGC TIA with resistance and capacitance degeneration and an inductorless LA with active feedback, respectively, with negative capacitance to broaden the bandwidth. The receiver also employs inductorless TIA [6] and negative impedance compensation for low power and low voltage LA [9].…”
Section: Introductionmentioning
confidence: 99%
“…With the continuous increase of data rate, the conventional structure of LA in CMOS technology is difficult to implement due to the serious parasitic effect and inherent low cut-off frequency of MOSFET. Therefore, many bandwidth enhance-ment techniques have been proposed to overcome this problem, such as inductive peaking [7], Cherry-Hooper structure [8], and negative Miller capacitance [9]. Among these techniques, inductive peaking is favored by designers because of its simple structure and impressive effect [10].…”
Section: Introductionmentioning
confidence: 99%