This brief analyzes the performance of regulated cascode (RGC) topology and develops a broadband transimpedance amplifier (TIA) incorporated with a novel dual shunt-feedback configuration. Compared to traditional RGC circuit, the proposed TIA improves the natural frequency and optimizes the damping factor. Furthermore, the common source auxiliary amplifier is replaced by an inverter amplifier to provide extra gain and reduce the equivalent input noise current. Based on 0.18-µm CMOS technology, a TIA with enhanced RGC structure was optimized and implemented, and the fabricated chip was mounted on a Rogers 4003C printed circuit board. The experimental results demonstrate a 5.2 GHz bandwidth and a 60.5 dBΩ transimpedance gain for 0.5 pF photodetector capacitance. The fluctuation of group delay is less than 50 ps, and the measured average equivalent input noise current density is about 14.99 pA/√Hz. The chip consumes 28.4 mW using 1.8 V supply.
We present an inductorless circuit technique for a CMOS limiting amplifier (LA), which consists of an input buffer, third-order broadband gain stages, and an output buffer for driving 50-Ω transmission lines. By employing stream-mode active feedback with negative capacitance circuit (NCC), the bandwidth of the proposed circuit can be effectively enhanced while maintaining a flat frequency response within the −3 dB bandwidth. Based on TSMC 0.18-µm CMOS process, the proposed LA circuit is optimized and implemented. The measurement results shown that the −3 dB bandwidth is 7.2 GHz with a voltage gain of 41 dB, and a data rate of 9 Gb/s is successfully achieved. The fluctuation of the group delay is less than ²25 ps, and the maximum output voltage is 1 V pp. The measured noise figure of the LA circuit is about 10 dB. Due to the absence of spiral inductors, the die only occupies a core size of 0.3 × 0.2 mm 2 , and consumes 79 mW from a 1.8 V supply voltage.
A broadband transimpedance amplifier (TIA) is designed and analyzed based on Regulated Cascode (RGC) configuration with L-matching network and cascode amplifier. A novel single-to-differential amplifier is also designed to simplify the following limiting amplifier (LA) design and increase the immunity of common-mode noise. The TIA is implemented in UMC 0.18 µm standard CMOS process. The measured transimpedance gain is 57 dBΩ with a −3 dB bandwidth of 8.1 GHz. The average equivalent input noise current spectral density is 29 pA/√Hz. The chip consumes 68 mW DC power under 1.8 V and occupies the area of 0.9 mm 2 .
Abstract.A novel transimpedance amplifier (TIA) based on regulated cascode (RGC) configuration was proposed, in which a bias network was added to ensure the main amplifier and the auxiliary amplifier of RGC operate at optimum condition. To achieve high bandwidth, a T-passive matching network was introduced at the input. Since both amplifiers have optimum gain-bandwidth product (GBW), thus low noise and high bandwidth can be obtained in our design scheme. The proposed TIA was designed based on UMC 0.18 μm CMOS process, and the simulation results demonstrated that our TIA has a transimpedance gain of 51 dBΩ and a -3 dB bandwidth of 14 GHz with a input capacitance of 0.3 pF. The average equivalent input noise current spectral density is about 13 pA/√Hz within -3 dB bandwidth.
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.