An ultra-low-power 2-step wake-up receiver for IEEE 802.15.4g wireless sensor networks

Abe, Takayuki; Matsukawa, Takashi; Satou, Kenichirou; Nomasaki, Daisuke; Nakamura, Shigeki; Horiuchi, Yoichiro; Imamura, Koji

doi:10.1109/vlsic.2014.6858382

Cited by 37 publications

(25 citation statements)

References 1 publication

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“…Instead, low-IF architecture is used, e.g., in [24] the signal is down converted from 925 MHz to 1 MHz IF by a passive mixer and a ring oscillator based phase locked loop (PLL) that generates the LO frequency. At low-IF the signal is amplified and rectified.…”

Section: Direct-conversion and Low Intermediate Frequencymentioning

confidence: 99%

WBAN Energy Efficiency and Dependability Improvement Utilizing Wake-Up Receiver

Petäjäjärvi

Karvonen

Mikhaylov

et al. 2015

IEICE Trans. Commun.

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SUMMARYThis paper discusses the perspectives of using a wake-up receiver (WUR) in wireless body area network (WBAN) applications with event-driven data transfers. First we compare energy efficiency between the WUR-based and the duty-cycled medium access control protocolbased IEEE 802.15.6 compliant WBAN. Then, we review the architectures of state-of-the-art WURs and discuss their suitability for WBANs. The presented results clearly show that the radio frequency envelope detection based architecture features the lowest power consumption at a cost of sensitivity. The other architectures are capable of providing better sensitivity, but consume more power. Finally, we propose the design modification that enables using a WUR to receive the control commands beside the wake-up signals. The presented results reveal that use of this feature does not require complex modifications of the current architectures, but enables to improve energy efficiency and latency for small data blocks transfers.

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Section: Direct-conversion and Low Intermediate Frequencymentioning

confidence: 99%

WBAN Energy Efficiency and Dependability Improvement Utilizing Wake-Up Receiver

Petäjäjärvi

Karvonen

Mikhaylov

et al. 2015

IEICE Trans. Commun.

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“…In order to widen dynamic range, a variablegain multistage RF amplifier is employed instead of a fixed-gain RF amplifier. In general, RF front-ends in receivers consume vast majority of total power, for example, 72% in [4] (exclusive of DCO), about 73.8% in [5] or 70%-96% in [7]. In the proposed architecture, the RF front-end is provided a clock to turn it on and off periodically.…”

Section: Architecture Of the Receivermentioning

confidence: 99%

“…Recently, many low power receivers have been reported [1,2,3,4,5,6,7,8]. The receivers on [1,2] and [4] are down-conversion receivers with on-chip local oscillators and mixers.…”

Section: Introductionmentioning

confidence: 99%

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A 27.6 µW 315 MHz low-complexity OOK receiver with on-off RF front-end

Hoang

Sugii²,

Ishibashi

2015

IEICE Electron. Express

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This paper presents a receiver design with the on-off keying (OOK) modulation at 315 MHz frequency. In this design, we propose a new architecture for the receiver to achieve low complexity with a solution to reduce total power consumption significantly. The operation of the proposed architecture is verified using available RF front-end circuits and a fieldprogrammable-gate-array (FPGA) device. Circuit of the receiver is designed by using SPICE models of 65 nm Silicon On Thin Buried Oxide (SOTB) CMOS technology. By simulation, the receiver achieves −76 dBm sensitivity, consumes 27.6 µW from 1 V supply voltage with data rate up to 200 Kbps.

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“…However, the LO requires an external inductor to achieve good phase noise to avoid reciprocal mixing at low power, while non-linearity and limited RF filtering make it vulnerable to in-band interferers. To reduce the number of external components, Envelope Detector (ED) based receivers are proposed [3][4][5][6][7]. However, their selectivity and linearity are poor if an external high-Q filter is not used.…”

Section: Introductionmentioning

confidence: 99%

A 915 MHz 175 $\mu \text{W}$ Receiver Using Transmitted-Reference and Shifted Limiters for 50 dB In-Band Interference Tolerance

Zee

Nauta

2016

IEEE J. Solid-State Circuits

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-Improving interference robustness in Ultra-Low Power (ULP) receivers is a big challenge due to their low power budget. This paper presents an envelope detector based 915MHz 10kbps ULP receiver, which is fabricated in 65nm CMOS process for Wireless Sensor Networks (WSN) and Internet of Things (IoT). Two power-efficient techniques:Transmitted-Reference and Shifted Limiter, are proposed to improve the interference robustness. The receiver sensitivity is between -61 and -76dBm. The maximum in-band Signal-to-Interference Ratio (SIR) at +/-1MHz offset is up to -50dB while just consuming 175µW power from a 1V supply.

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An ultra-low-power 2-step wake-up receiver for IEEE 802.15.4g wireless sensor networks

Cited by 37 publications

References 1 publication

WBAN Energy Efficiency and Dependability Improvement Utilizing Wake-Up Receiver

WBAN Energy Efficiency and Dependability Improvement Utilizing Wake-Up Receiver

A 27.6 µW 315 MHz low-complexity OOK receiver with on-off RF front-end

A 915 MHz 175 $\mu \text{W}$ Receiver Using Transmitted-Reference and Shifted Limiters for 50 dB In-Band Interference Tolerance

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