An RCC receiver IC with TAD-DQD and ADPLL using frequency multiplying number with decimals

Abstract

A 0.18-m CMOS RCC (radio-controlled clock) receiver IC with TAD (Time A/D converter) and ADPLL was realized. This IC, which receives low-frequency (LF) standard time waves, performs AM detection with digital circuits. It has two key components. First, TAD is an all-digital analog-todigital converter, whose voltage resolution is settable (15 V/LSB at 100kS/s and 3.1mV/LSB at 20MS/s). Second, the ADPLL applying a frequency multiplying number of 4.8828125 generates a 160 kHz ADC (TAD) sampling clock from a 32.768 kHz quartz-clock for digital detection processing. The DSP section, which operates as an adder-subtractor and digital filters, consists of standard cells (75,000 gates). This test IC achieved minimum detectable sensitivity of 0.7 Vrms and maximum detectable sensitivity of 100 mVrms for a standard time wave of 40 kHz at the LNA input terminal. Since the TAD sampling frequencies are settable with desirable multiplying numbers with decimals, the IC can receive different kinds of LF standard time waves such as 40 kHz (JP), 60 kHz (JP), 77.5 kHz (DE), and 68.5 kHz (CN) without any use of quartz-crystal filters.

All-digital TAD-OFDM detection for sensor interface using TAD-digital synchronous detection

“…Consequently, this advantage effectively and practically works in the digital-rich RF receiver ICs [17], [20] without the need for a compensation method for them to detect carrier wave amplitudes. For instance, we experimentally confIrmed the use of small-sized impedance converters (voltage buffers) for the RDL as shown in [17] for achieving the low-power one-chip RCC receiver IC, which can detect small input signals (0.7 IlVrms of RCC carrier wave amplitude) at its LNA input terminal.…”

“…Regarding an impedance converter to avoid loading the signal �n' taking advantage of the inherent filter effect, we can use a small-sized buffer. In fact, TAD is put to practical use in digital-type sensor IC products [7] and applied as an ADC of the digital-type Radio-Controlled Clock (RCC) receiver IC [17], [18] by just using a small-sized op amp (45 f.l.m x 50 f.l.m in 0.18-f.l.m CMOS) as the impedance converter for the RDL (for more details about the TAD filter, please refer to [10], [18]).…”

“…Incidentally, in case of dealing with unknown carrier-wave phase information, the TAD-Digital Quadrature Detection (T AD-DQD) can also be available as described in [17], [18].…”