An oscillation-based built-in test scheme with AGC loop

Toczek, Wojciech

doi:10.1016/j.measurement.2006.06.007

Cited by 4 publications

(3 citation statements)

References 25 publications

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“…It is worth mentioning that the specialized BISTs for analog circuits, e.g. the oscillation OBISTs [8], histogram HBISTs [9], testers for fully differential circuits [10], TBISTs [11], and  type testers [12] have to be extended with additional circuits enabling them to communicate with the testing system. The JTAG BISTs are free from that shortcoming, since they are already equipped with the JTAG communication interface.…”

Section: Introductionmentioning

confidence: 99%

A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus

Czaja¹

2016

ELECTROTECHNICAL REVIEW

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A new solution of the JTAG BIST for testing analog circuits in mixed-signal electronic microsystems controlled by microcontrollers and equipped with the IEEE1149.1 bus is presented. It is based on a new fault diagnosis method in which an analog circuit is stimulated by a buffered signal from the TMS line, and the time response of the circuit to this signal is sampled by the ADC equipped with the JTAG. The method can be used for fault detection and single soft fault localization in an analog tested circuit (A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus). Streszczenie. Przedstawiono nowe rozwiązanie testera JTAG BIST przeznaczonego do testowania torów analogowych w mieszanych sygnałowo mikrosystemach elektronicznych sterowanych mikrokontrolerami i wyposażonych w magistralę testującą IEEE1149.1 (JTAG). Bazuje ona na nowej metodzie diagnostycznej, w której tor analogowy pobudzany jest buforowanym sygnałem z linii TMS, a odpowiedź czasowa tego toru na ten sygnał jest próbkowana przez przetwornik A/C wyposażony w interfejs JTAG. Metoda ta pozwala na detekcję i lokalizację pojedynczych uszkodzeń parametrycznych w analogowym układzie badanym (Metoda testowania części analogowych analogowo-cyfrowych systemów elektronicznych wyposażonych w magistralę testującą IEEE1149.1).

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Section: Introductionmentioning

confidence: 99%

A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus

Czaja¹

2016

ELECTROTECHNICAL REVIEW

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“…The main direction of development of testing analog circuits in EESs is the built-in self-test (BIST) technique. In last years many specific solutions of BISTs dedicated for concrete circuits have been reported: oscillation-based BIST (OBIST) [1], digital reuse [2], histogram based [3], [4] dedicated for fully-differential stages [5], [6],  BIST [7], [8] and ADC BIST for AD converters. The common feature of these solutions is hardware excess, i.e.…”

Section: Introductionmentioning

confidence: 99%

Two-functional µBIST for Testing and Self-Diagnosis of Analog Circuits in Electronic Embedded Systems

Załęski

Zielonko

2014

ACTA IMEKO

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The paper concerns the testing of analog circuits and blocks in mixed-signal Electronic Embedded Systems (EESs), using the Built-in Self-Test (BIST) technique. An integrated, two-functional, embedded microtester (µBIST) based on reuse of signal blocks already present in an EES, such as microprocessors, memories, ADCs, DACs, is presented. The novelty of the µBIST solution is its extended functionality. It can perform 2 testing functions: functional testing and fault diagnosis on the level of localization of a faulty element. For functional testing the Complementary Signals (CSs), and for fault diagnosis the Simulation Before Test (SBT) vocabulary techniques have been used. In the fault vocabulary the graphical signatures in the form of identification curves in multidimensional spaces have been applied.

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“…Built-in test (BIT) technology is an important means to improve testing and diagnostic capabilities of the system or equipment [1]. It is an important testability design of electronic systems, which has been widely used in the area of aerospace and weapons system [2,3]. Intermittent faults are a growing problem in electronic equipment.…”

Section: Introductionmentioning

confidence: 99%

A Novel Markov Model and its Application to BIT System

Zheng

Wang

2012

AMM

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Intermittent fault is the main factor for the raise of false alarm during the process of the detection in built-in test (BIT). Two-state Markov model and three-state Markov model for test is built for system fault diagnosis with BIT. According to the application of BIT in some complex system, a comparison of the false alarm rate between two-state Markov model and three-state Markov model is present, which shows we can reduce the false alarm rate (FAR) and improve fault detection rate by using three-state Markov model in BIT.

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An oscillation-based built-in test scheme with AGC loop

Cited by 4 publications

References 25 publications

A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus

A testing method of analog parts of mixed-signal electronic systems equipped with the IEEE1149.1 test bus

Two-functional µBIST for Testing and Self-Diagnosis of Analog Circuits in Electronic Embedded Systems

A Novel Markov Model and its Application to BIT System

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