An optimum parallel architecture for high-speed real-time digital signal processing

Lang, G. R.; Dharssi, M.; Longstaff, F.M.; Longstaff, P.S.; Metford, P.A.S.; Rimmer, M.T.

doi:10.1109/2.18

Cited by 6 publications

(1 citation statement)

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“…The concept is not new; compilers implementing retargetable code generation date back to 1958 [4]. 3 DISIPLE System Design DISIPLE's structure consists of three basic components: the front end, middle, and back end. The front end performs lexical analysis on the source program written in a language such as C, Ada, or Pascal, and translates it into the intermediate high level language DSPL (Digital Signal Processing Language).…”

Section: Introductionmentioning

confidence: 99%

A compiler that easily retargets high level language programs for different signal processing architectures

Peters

Dunn

International Conference on Acoustics, Speech, and Signal Processing

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This paper describes a compiler for signal processing applications with high level language control structures and the ability to express computational parallelism. There are two expert system back ends that generate code using advice about the architecture of the target machine(s). The first back end generates code for control flow, and the second generates code for computation. Both expert systems use a rule base that describe the number, type, and architecture of the target processors. If an instruction cannot be directly implemented, then functionally equivalent intermediate language statements are automatically generated. Currently, the prototype compiler generates TMS320 family assembly code and code for distributed memory parallel computers.

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Section: Introductionmentioning

confidence: 99%