An Open-Source Cloud-FPGA Gene Regulatory Accelerator

Abstract

FPGAs are suitable to speed up gene regulatory network (GRN) algorithms with high throughput and energy efficiency. In addition, virtualizing FPGA using hardware generators and cloud resources increases the computing ability to achieve on-demand accelerations across multiple users. Recently, Amazon AWS provides high-performance Cloud's FPGAs. This work proposes an open source accelerator generator for Boolean gene regulatory networks. The generator automatically creates all hardware and software pieces from a high-level GRN description. We evaluate the accelerator performance and cost for CPU, GPU, and Cloud FPGA implementations by considering six GRN models proposed in the literature. As a result, the FPGA accelerator is at least 12x faster than the best GPU accelerator. Furthermore, the FPGA reaches the best performance per dollar in cloud services, at least 5x better than the best GPU accelerator.

Gene regulatory accelerators on cloud FPGA

“…Section 3.2 introduces the first cloud GRN FPGA accelerator for attractor computation developed in our previous work. 18 We propose an enhanced version by using presents the CPU/FPGA integration at the software level by using OpenCL.…”

“…In our previous work, 18 the time multiplexer interconnection approach requires a large bus bandwidth to send/receive the data to/from the CPU.…”

“…17 However, there are still many challenges to the software community's widespread adoption of these FPGA platforms. In a previous work, 18 we propose simplifying FPGA accelerator design by providing a tool to automatically generate the hardware and software components from the GRN specification. The user should only write the GRN equations and the state space to explore, and the tool generates code that is ready to execute in Amazon AWS FPGA instances.…”

Aceleradores com CGRAs para Redes Reguladoras de Genes

“…Outras implementac ¸ões em FPGA descritas em Verilog para redes Booleanas foram apresentadas em [Miskov-Zivanov et al 2011] e [Manica 2019] mostrando um ganho de desempenho comparado ao simulador Booleanet implementado em software [Albert et al 2008]. Enquanto os trabalhos anteriores foram apenas simulados ou avaliados em placas isoladas, para simplificar a tarefa de projeto e disponibilizar as ferramentas para comunidade em geral, um gerador de código para FPGA com acesso nas plataformas de nuvem foi proposto em [da Silva et al 2017] e [Braganc ¸a et al 2021] que executam na plataforma HARP da Intel e nos FPGAs da Xilinx na Amazon. Os geradores mostraram ganhos de 12× e 64× em comparac ¸ão com uma GPU V100 e um processador com 64 núcleos, respectivamente.…”

“…Cada EP irá implementar a func ¸ão de um gene. As ligac ¸ões entre os EPs irão fazer a comunicac ¸ão para a evoluc ¸ão da dinâmica da rede [Braganc ¸a et al 2021].…”