An integrated tri-mode non-inverting buck-boost DC-DC converter with segmented power devices and power transmission gate structure

Jin, Guang Lei; Ng, Wai Tung

doi:10.1109/ispsd.2014.6856011

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Hybrid Digital Pwm1

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Cited by 3 publications

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“…In this case, the hybrid DPWM uses a 5-bit counter and a 5-bit delay-line is as shown in Figure 2. In order to generate four outputs to the tri-mode converter [5], two parallel hybrid DPWM algorithms are implemented on a Cyclone IV FPGA chip.…”

Section: Hybrid Digital Pwmmentioning

confidence: 99%

Digital controlled dead-time for tri-mode buck-boost DC-DC converters

Cheng

Yao

et al. 2014

2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)

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This paper introduces a unique digital controller for a tri-mode non-inverting buck-boost DC-DC converter that optimizes the switching dead-times to eliminate the cross-conductions and body-diode conductions. A hybrid digital pulse width modulator (DPWM) is developed to implement trailing-edge, leading-edge modulation at high switching frequencies. An improvement in peak power conversion efficiency of 4% in the boost mode is observed, with output current ranging from 0 to 6A.

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Section: Hybrid Digital Pwmmentioning

confidence: 99%