An integrated sensor interface circuit for ECG measurements

Nurmi, Jari; Williams, Maynard Owen; Jarvilehto, P.; Estola, K.-P.; Ruha, A.; Karema, T.; Tenhunen, Hannu

doi:10.1109/cmpeur.1989.93427

Cited by 5 publications

(2 citation statements)

References 3 publications

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“…A chip based on medical data acquisition system has been fabricated to reach requirements of patient safety, multiple biomedical signals like ECG, noise rejection and standard transducer interface [4]. Nurmi [5] has reported another interesting work with implementation of four macro modules on a chip: analog instrumentation amplifier, sigma-delta analog digital converter, digital filter for ECG preprocessing and output interface.…”

Section: Introductionmentioning

confidence: 99%

A novel fully integrated device dedicated to ECG signal measurement

Ayachi

Blondé

Zhou

et al. 2007

Analog Integr Circ Sig Process

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Section: Introductionmentioning

confidence: 99%

A novel fully integrated device dedicated to ECG signal measurement

Ayachi

Blondé

Zhou

et al. 2007

Analog Integr Circ Sig Process

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“…Another interesting work was realized by Nurmi who implemented four macro modules on a chip: analog instrumentation amplifier, sigma-delta analog digital converter, digital filter for ECG preprocessing and output interface 5 .…”

mentioning

confidence: 99%

An ECG signal acquisition system integrated in a 0.35 μm CMOS technology

et al. 2005

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In this paper we present an integrated ECG acquisition system implemented in a standard 0.35 µm CMOS technology. The system mainly consists of amplifiers, filters and an automatic offset compensation module. Composed of comparator, control logic and D/A converter, the compensator is an analog-digital mixed system and designed through a top-down approach. It is an independent module and can be easily reused. A low-pass filter of low cutoff frequency has been realized by using a Gm-C structure with very low bias current. Experimental measurements on the fabricated chip have been done. The results show that the integrated circuit works well with a low noise, a low consumption and a high efficacy of the offset compensator.

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ASIC design of digital ECG filter

Williams

Nurmi²,

Tenhunen³

Proceedings., Second Annual IEEE ASIC Seminar and Exhibit

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In this paper an ASIC design of digital linear phase ECG filter is presented. The filter is utilizing a novel recursive multiplierless architecture. A bit-serial approach has been chosen to keep circuit area and power consumption as small as possible. The implementation has been done using partly full custom and partly standard cell techniques yielding high transistor density and gate array design eficiency. In the implementation module generators have been used to allow flexible altering of the filter structure.

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An integrated sensor interface circuit for ECG measurements

Cited by 5 publications

References 3 publications

A novel fully integrated device dedicated to ECG signal measurement

A novel fully integrated device dedicated to ECG signal measurement

An ECG signal acquisition system integrated in a 0.35 μm CMOS technology

ASIC design of digital ECG filter

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