Proceedings. 15th Symposium on Integrated Circuits and Systems Design
DOI: 10.1109/sbcci.2002.1137637
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An integrated CMOS instrumentation amplifier with improved CMRR

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Cited by 13 publications
(8 citation statements)
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“…This paper considers a new calculation method of the DDA errors from the several input common-mode voltages on different inputs (1-2, 3-4) of DDA. Also the circuit and parametric solutions for DDAs input stages, which increase the CMRR are proposed [10,8,11,7,12,13,14,15,9]. The presence of the common-mode voltages 2 / ) (…”
Section: Inclusionmentioning
confidence: 99%
“…This paper considers a new calculation method of the DDA errors from the several input common-mode voltages on different inputs (1-2, 3-4) of DDA. Also the circuit and parametric solutions for DDAs input stages, which increase the CMRR are proposed [10,8,11,7,12,13,14,15,9]. The presence of the common-mode voltages 2 / ) (…”
Section: Inclusionmentioning
confidence: 99%
“…In order to maximize the CMRR of the instrumentation amplifier, the value of 1/R 1 and the transconductance of the input pair should be maximized, thus making the amplifier common-mode gain minimum [10], [13]. For the same purpose, the output resistance of current sources M s1,2 and the transconductance of transistors M d1,2 should be set as high as possible.…”
Section: Design Of the Proposed Wideband Current-feedback Instrumentioning
confidence: 99%
“…In addition to that, output resistances of the current sources M3-M6 should be as high as possible, which is already demonstrated by [6]. It is important to note that systematic CMRR defines the maximum limit of CMRR under ideal conditions and will be reduced by the process related mismatches.…”
Section: Systematic Cmrrmentioning
confidence: 82%
“…For a cascode current mirror, similar to [6], and assuming equal sized mirror transistors, ∆g o (∆V in ) can be written as:…”
Section: Cmrr Limit Due To Electrode Offsetmentioning
confidence: 99%
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