An integrated Boost Controller with MPPT for Submodule PV Applications

Hanhart, Michael; Rolff, Leo; Grobe, Jan; Zoche, Jonas; Wunderlich, Ralf; Heinen, Stefan

doi:10.1109/esscirc53450.2021.9567804

Cited by 4 publications

(1 citation statement)

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“…However, under partial shaded conditions, DPP-converters must be able to handle the full missing power to be as efficient as the aforementioned architectures. Additionally, communication channels between adjacent converters are necessary for MPP-tracking. This work proposes an integrated MPP-tracking boost controller for submodule PV applications [13]. The PV system topology is shown in Fig.…”

Section: Introductionmentioning

confidence: 99%

An Integrated 50 V Boost Controller With Digitally-Assisted MPPT for Submodule PV Applications

Hanhart

Rolff

Zoche

et al. 2023

IEEE Open J. Power Electron.

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This work introduces an integrated maximum power point tracking boost controller for photovoltaic submodule applications. The IC offers a wide input voltage range from 7 V to 24 V, whereas the output voltage is actively limited to 50 V. The presented design utilizes discrete, low-ohmic MOSFETs for the output stage and thus supports input power levels up to 144 W. The converter operates with peakcurrent-mode control at 300 kHz switching frequency in continuous conduction mode. During light load operation, the control transitions to direct input voltage sensing pulse-frequency-modulation (PFM) with input and output voltage dependent peak inductor current. Moreover, the low-side resistive current sense is explained in detail together with an inductor current replication circuit for precise high-side turn-off. The maximum power point tracker (MPPT) is based on an adjustable resistive sense element and a delta modulator and achieves 99.9 % tracking efficiency, omitting any need for a high resolution analog-to-digital converter (ADC). In addition, the series connection of multiple DC/DC converters is examined. The peak system efficiency measures 98.4 %. The application-specific integrated circuit (ASIC) is manufactured in an 0.18 µm HV-BCD process and occupies 6.25 mm 2 of silicon area.

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Section: Introductionmentioning

confidence: 99%