Proceedings of the 2007 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems 2007
DOI: 10.1145/1289881.1289889
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An integrated ARM and multi-core DSP simulator

Abstract: In this paper we describe the design and implementation of a flexible, and extensible, just-in-time ARM simulator designed to run co-operatively with a multi-core DSP simulator on x86 hosts. The integrated simulator can boot ARM/Linux alongside another operating system running on DSP cores, thus truly supporting a heterogeneous multi-core operating environment. In addition, the simulator facilitates exploration of several system design parameters such as memory latencies, cache organization etc. via lightweigh… Show more

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Cited by 3 publications
(1 citation statement)
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“…In this context [136] mixes the interpreted ISS simulation with the compiled ISS simulation in order to allow a multi-processing simulation approach to increase simulation speed. Reference [144] describes an ultra-fast ARM and multi-core DSP instruction set simulation environment based on just-in-time (JIT) translation technology, which refers to the dynamic translation of the target instructions (ARM, DSP) to the host instructions (×86) during the execution.…”
Section: State Of the Artmentioning
confidence: 99%
“…In this context [136] mixes the interpreted ISS simulation with the compiled ISS simulation in order to allow a multi-processing simulation approach to increase simulation speed. Reference [144] describes an ultra-fast ARM and multi-core DSP instruction set simulation environment based on just-in-time (JIT) translation technology, which refers to the dynamic translation of the target instructions (ARM, DSP) to the host instructions (×86) during the execution.…”
Section: State Of the Artmentioning
confidence: 99%