Instruction set extensions for the advanced encryption standard on a multithreaded software defined radio platform

Abstract

Software-defined radio (SDR) is an emerging technology that facilitates having multiple wireless communication protocols on one device. Previous work has shown that current W-CDMA, GPS, GSM, and WiMAX applications can run on this class of device while consuming significant processing power. Next generation wireless networks require speeds in excess of 50Mbps. Some of the fastest AES software implementations only achieve 20Mbps on our reference platform. In order to have secure software-defined radio, the security processing gap must be addressed. This paper presents instruction set architecture (ISA) extensions for the Sandblaster DSP. The Sandblaster DSP is a multithreaded processor for SDR that issues multiple operations each cycle and supports vector operations.

Optimization of a novel programmable data-flow crypto processor using NSGA-II algorithm

“…Considering the fact that cryptography – by its very nature – is always ever-changing, the need for a flexible platform that can implement a wide range of cryptographic primitives, algorithms, and protocols was soon recognized. Since the late 90s, activities concerning the implementation of multiple security algorithms have centred around three main approaches: Customized General Purpose Processor (GPP) [6] , [7] , [8] , [9] , [10] , [11] , [12] , Crypto Co-processor [13] , [14] , [15] , [16] , and Crypto Processor [17] , [18] , [19] , [20] , [21] . While throughput was almost always the prime metric, other figures of merit were sought such as flexibility and security.…”