An In-Plane Solid-Liquid-Solid Growth Mode for Self-Avoiding Lateral Silicon Nanowires

Yu, Linwei; Alet, Pierre-Jean; Picardi, Gennaro; Cabarrocas, Pere Roca i

doi:10.1103/physrevlett.102.125501

Cited by 79 publications

(122 citation statements)

References 17 publications

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“…11 A unique feature of the in-plane growth lies in that the movement of catalyst drops can be guided by simple surface features, like a single edge step. This allows to determine the position and the growth path of the SiNWs 7,8,10,12 and offers an exciting opportunity to position the in-plane SiNWs during their growth without interrupting the vacuum. Here, we explore this feature to deploy self-positioned SiNWs in a process compatible with large area substrates and demonstrate prototype SiNWsFETs devices.…”

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confidence: 99%

“…In contrast to the VLS process 9 that takes place in a gas precursor environment, a thin layer of hydrogenated amorphous Si (a-Si:H) is absorbed by indium catalyst drops, moving on a substrate surface, to produce crystalline in-plane SiNWs. 7,8,10 The driving force, as depicted in Fig. 1(a), arises from the difference in Gibbs energy between hydrogenated amorphous Si (a-Si:H) and crystalline Si.…”

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confidence: 99%

“…We have proposed recently an in-plane solid-liquidsolid (IPSLS) SiNW growth mode 7,8 to address this challenge by fabricating in-plane SiNWs all-in-situ in a plasma chemical vapor deposition (PECVD) system. In contrast to the VLS process 9 that takes place in a gas precursor environment, a thin layer of hydrogenated amorphous Si (a-Si:H) is absorbed by indium catalyst drops, moving on a substrate surface, to produce crystalline in-plane SiNWs.…”

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confidence: 99%

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Growth-in-place deployment of in-plane silicon nanowires

Chen²,

O’Donnell³

et al. 2011

Applied Physics Letters

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International audienceUp-scaling silicon nanowire (SiNW)-based functionalities requires a reliable strategy to precisely position and integrate individual nanowires. We here propose an all-in-situ approach to fabricate self-positioned/aligned SiNW, via an in-plane solid-liquid-solid growth mode. Prototype field effect transistors, fabricated out of in-plane SiNWs using a simple bottom-gate configuration, demonstrate a hole mobility of 228 cm2/V s and on/off ratio >103. Further insight into the intrinsic doping and structural properties of these structures was obtained by laser-assisted 3 dimensional atom probe tomography and high resolution transmission electron microscopy characterizations. The results could provide a solid basis to deploy the SiNW functionalities in a cost-effective way

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Growth-in-place deployment of in-plane silicon nanowires

Chen²,

O’Donnell³

et al. 2011

Applied Physics Letters

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“…The other is via an in-plane solid-liquid-solid (IPSLS) growth mode, where a hydrogenated amorphous silicon (a-Si:H) thin film is fed into catalyst droplets to produce in-plane SiNWs at a growth rate typically up to 40 nm s À 1 (Fig. 1b), thanks to a direct contact to a solid a-Si:H precursor 18 . On the basis of APT observations coupled with scanning transmission electron microscopy (STEM), we access the distribution profile of the dissolved In and Sn impurities in the same NWs, and trace their concentration evolution as a function of the growth rate.…”

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confidence: 99%

Incorporation and redistribution of impurities into silicon nanowires during metal-particle-assisted growth

et al. 2014

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The incorporation of metal atoms into silicon nanowires during metal-particle-assisted growth is a critical issue for various nanowire-based applications. Here we have been able to access directly the incorporation and redistribution of metal atoms into silicon nanowires produced by two different processes at growth rates ranging from 3 to 40 nm s À 1 , by using laser-assisted atom probe tomography and scanning transmission electron microscopy. We find that the concentration of metal impurities in crystalline silicon nanowires increases with the growth rate and can reach a level of two orders of magnitude higher than that in their equilibrium solubility. Moreover, we demonstrate that the impurities are first incorporated into nanowire volume and then segregate at defects such as the twin planes. A dimer-atominsertion kinetic model is proposed to account for the impurity incorporation into nanowires.

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“…In an earlier study, NW bending during in-plane growth was attributed to the seed particle precipitating NW crystal faster than the seed particle itself is moving on the surface. 26 As a result, the NW crystal protrudes into the seed particle until it is quickly pushed to a new location. At this point, the seed particle location can change in respect with the NW crystal, and the NW growth proceeds to a new direction.…”

Section: Resultsmentioning

confidence: 99%

GaAs nanowires grown on Al-doped ZnO buffer layer

Haggrén¹,

Perros²,

Dhaka³

et al. 2013

Journal of Applied Physics

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We report a pathway to grow GaAs nanowires on a variety of substrates using a combination of atomic layer deposition and metallo-organic vapor phase epitaxy (MOVPE). GaAs nanowires were grown via MOVPE at 430-540 C on an atomic-layer-deposited Al:ZnO buffer layer. The resulting nanowires were affected only by the properties of the buffer layer, allowing nanowire growth on a number of substrates that withstand $400 C. The growth occurred in two phases: initial in-plane growth and subsequent out-plane growth. The nanowires grown exhibited a strong photoluminescence signal both at room temperature and at 12 K. The 12 K photoluminescence peak was at 1.47 eV, which was attributed to Zn autodoping from the buffer layer. The crystal structure was zincblende plagued with either twin planes or diagonal defect planes, which were related to perturbations in the seed particle during the growth. The used method combines substrates with variable properties to nanowire growth on a transparent and conductive Al:ZnO buffer layer. V C 2013 AIP Publishing LLC.

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An In-Plane Solid-Liquid-Solid Growth Mode for Self-Avoiding Lateral Silicon Nanowires

Cited by 79 publications

References 17 publications

Growth-in-place deployment of in-plane silicon nanowires

Growth-in-place deployment of in-plane silicon nanowires

Incorporation and redistribution of impurities into silicon nanowires during metal-particle-assisted growth

GaAs nanowires grown on Al-doped ZnO buffer layer

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