An experimental study of mobility enhancement in ultrathin SOI transistors operated in double-gate mode

Esseni, D.; Mastrapasqua, M.; Celler, G. K.; Fiegna, Claudio; Selmi, L.; Sangiorgi, E.

doi:10.1109/ted.2002.807444

Cited by 110 publications

(56 citation statements)

References 27 publications

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“…We could not reliably extract μ SC and μ LC at T SOI = 4 nm due to high R EXT . We observe ∼10% mobility degradation at low values of N S on reducing T SOI from 8 to 6 nm, consistent with the data reported in [15]- [17] at low N S . However, at a technologically relevant N S ∼ 1 × 10 13 cm −2 , which corresponds to the ON-state condition, we do not find any μ SC degradation and only 3% μ LC degradation on scaling T SOI from 8 to 6 nm, similar to the data in [15].…”

Section: Resultssupporting

confidence: 91%

Gate Length and Performance Scaling of Undoped-Body Extremely Thin SOI MOSFETs

Majumdar

Wang

Kumar

et al. 2009

IEEE Electron Device Lett.

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Abstract-In this letter, we show that undoped-body extremely thin SOI (ETSOI) MOSFETs with SOI thickness in the 4-6-nm range have excellent short-channel control down to 20-25-nm gate lengths, suitable for the 22-nm technology node and beyond. We demonstrate that 6-nm-thin ETSOI devices can deliver high drive currents required for logic applications. Finally, we bring to fore the need for improvements in etch and doping processes to reduce series resistance of 4-nm-thin ETSOI devices in order to make them a viable option for the 15-nm technology node.

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Section: Resultssupporting

confidence: 91%

Gate Length and Performance Scaling of Undoped-Body Extremely Thin SOI MOSFETs

Majumdar

Wang

Kumar

et al. 2009

IEEE Electron Device Lett.

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“…In an extremely thin body, volume inversion and quantum confinement make it possible to reach outstanding transconductance, even higher than twice the value in single gate MOSFETs [14,23]. The main difficulty resides in devising a practical technology.…”

Section: Multiple-gate Soi Mosfetsmentioning

confidence: 99%

New physics mechanisms enabled by advanced SOI CMOS engineering

Cristoloveanu

2004

Materials Science and Engineering: B

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“…Lower effective electric field is occurred ,but at lower inversion densities the mobility is reduced with reduction of tsi [19]. Quantum well is developed between oxide layers which is formed by thin silicon layer .Quantum well is reduced and this reduction in the mobility is observed due to the scattering occur by surface roughness.…”

Section: Drain Currentmentioning

confidence: 98%

“…And Overshoot velocity can be evaluated and described by given equation below (18) Where is described as (19) Channel length saturation must be found for device operated in saturation region of the device due to the channel length modulation which become an important factor and this effect is shown below ( ) (20) Where L C is proportionally depended on and this is given by equation as shown below [24].…”

mentioning

confidence: 99%