An experimental study comparing the relative effectiveness of functional, scan, IDDq and delay-fault testing

Empirical computation of reject ratio in VLSI testing

“…on the same set of devices [4,5]. With these data sets it will be possible to study and compare the projections of our model for the various types of tests.…”

“…Figure 5 shows the event size distributions in various windows of 1000 test vectors and their approximation by the model curves l= k . The optimum values of k in each case is found to vary slightly so we replace k by kt = a + b:t (4) Normalizing the function, we get the expression for event-size probability P r o b ft = = t = 1 = 1= kt :1= P mt 1 1= kt ; 1 mt (5) As observed earlier in this section, the variance of the fallout, mt, decreases quickly as the test progresses. In this work we have modeled mt in the same way as the event probability so mt = m 0 :1 , 1 , e ,gt h where kt are mt are given by Equations 4 and 6 respectively.…”

Efficient RTL Coverage Metric for Functional Test Selection

“…In addition to design validation, functional tests can also be reused for manufacturing test. Studies have shown additional fallout using functional tests even for test set with high structural coverage [4,5].…”

X-IDDQ: A Novel Defect Detection Technique Using IDDQ Data

“…This paper demonstrates the effectiveness of this technique by applying it to the SEMATECH dataset. The SEMATECH study [14] involved a 116K-gate standard graphics controller chip designed in IBM Phoenix CMOS4LP technology. 18,466 devices in the study underwent four tests: stuck-at fault, functional, delay and I DDQ .…”

“…A SEMATECH study [14] was undertaken to determine the relative effectiveness of different testing methodologies. Although some defective ICs were detected by more than one test methods, the study concluded that all test techniques uniquely detected some class of defects and none of them might be dropped in favor of some other technique [15].…”