An Excellent Gain Flatness 3.0–7.0 GHz CMOS PA for UWB Applications

Murad, S. A. Z.; Pokharel, Ramesh K.; Galal, A. I. A.; Sapawi, Rohana; Kanaya, Haruichi; Yoshida, Keiji

doi:10.1109/lmwc.2010.2052593

Cited by 44 publications

(11 citation statements)

References 5 publications

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“…Table 1 summarizes the performance of recently published broadband PAs. As can be seen that the overall performances of proposed design are expected to be compatible with [8, 9] and [12], that is, it is found that has obtained average gain flatness, high linearity, and good efficiency for PA design. With these characteristics the proposed is suitable for broadband applications.…”

Section: Measurement Resultsmentioning

confidence: 66%

A 0.9–3.5 GHz high linearity, good efficiency CMOS broadband power amplifier using stagger tuning technique

Sapawi

Pokharel

Mat

et al. 2012

Micro & Optical Tech Letters

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A simple CMOS broadband power amplifier design with high linearity and good efficiency is proposed.The proposed power amplifier design employed stagger tuning technique that consist of two stages amplifier with different resonant frequencies to obtain a wider bandwidth from 0.9 to 3.5 GHz and low power consumption. To obtain high linearity self‐biased circuit is employed at the first stage of amplifier. The measurement results indicated that the proposed design achieves average gain of 8.5 dB, an input return loss (S11) less than −3 dB and output return loss (S22) less than −5 dB. High linearity, that is, IIP3 of 13.4 dBm at 2 GHz, power added efficiency of 34% is obtained while consuming 24.4 mW power from 1.5 V supply voltage. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:2881:2884, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27212

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Section: Measurement Resultsmentioning

confidence: 66%

A 0.9–3.5 GHz high linearity, good efficiency CMOS broadband power amplifier using stagger tuning technique

Sapawi

Pokharel

Mat

et al. 2012

Micro & Optical Tech Letters

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“…The full chip size is 0.75 mm 2 and the power consumption is 23.2 mW. Table 1 shows the summary and comparison of the key performances of this work with other reported PAs [3][4][5][7][8][9]. It shows that this work performs well on gain, linearity and efficiency under the lowest 1.2 V power supply.…”

Section: Simulation Resultsmentioning

confidence: 86%

“…The resistive shunt feedback configuration [5] provides a high and flat gain, but it suffers the large current drawback due to the strong dependence on the transconductance of amplifying transistor. Recently, a current-reused configuration [6][7][8] with good performance was proposed. But it needs a large supply voltage due to the stacked structure.…”

Section: Introductionmentioning

confidence: 99%

A folded current-reused CMOS power amplifier for low-voltage 3.0–5.0 GHz UWB applications

Qian

Cui

Wang

et al. 2013

2013 IEEE 10th International Conference on ASIC

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This paper proposes a low-voltage power amplifier for the 3.0-5.0 GHz ultra-wideband applications. Based on the classical current-reused technique, it adopts a folded topology to achieve the low-voltage working with acceptable output linearity. Its two-stage amplifying configuration consists of only one NMOS and one PMOS transistors. Implemented in the 0.18 m CMOS technology, it obtains a gain as high as 16 dB with only ±0.5 dB flatness over the full working band, and consumes only 23.2 mW with 0.75mm 2 size under 1.2 V.

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“…A hybrid technique power amplifier is a combination of the three main configurations of a power amplifier: cascaded topology, cascode topology, and shunt feedback topology. As shown in Figure 6, by combining more than one topology into the design of a power amplifier, many advantages can be achieved as compared with the one topology design [13]- [15], [18], [21], [28]- [33], [36], [37], [41]- [44], [48]- [50], [51], [57], [58]. To attain extra gain, several works have employed the cascode power amplifier topology followed by common-source topology [28].…”

Section: Hybrid Technique Power Amplifiermentioning

confidence: 99%

“…In the hybrid technique, more than one of the different implementation schemes of the wideband power amplifier was combined together to get the advantage of each scheme which makes that scheme the most attractive for the design of PAs. This technique has been widely used [13]- [15], [18], [21], [28]- [33], [13], [37], [41]- [44], [46], [48]- [51], [57], [58]. A summary of the published wideband hybrid-technique power amplifiers is presented in Table 3.…”

Section: Summary Of the Published Wideband Hybrid-technique Power Amp...mentioning

confidence: 99%

Ultra-wideband CMOS power amplifier for wireless body area network applications: a review

El-Feky

Ellaithy

Fedawy

2023

IJECE

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<span lang="EN-US">A survey on ultra-wideband complementary metal-oxide semiconductor (CMOS) power amplifiers for wireless body area network (WBAN) applications is presented in this paper. Formidable growth in the CMOS integrated circuits technology enhances the development in biomedical manufacture. WBAN is a promising mechanism that collects essential data from wearable sensors connected to the network and transmitted it wirelessly to a central patient monitoring station. The ultra-wideband (UWB) technology exploits the frequency band from 3.1 to 10.6 GHz and provides no interference to other communication systems, low power consumption, low-radiated power, and high data rate. These features permit it to be compatible with medical applications. The demand target is to have one transceiver integrated circuit (IC) for WBAN applications, consequently, UWB is utilized to decrease the hardware complexity. The power amplifier (PA) is the common electronic device that employing in the UWB transmitter to boost the input power to the desired output power and then feed it to the antenna of the transmitter. The advance in the design and implementation of ultra-wideband CMOS power amplifiers enhances the performance of the UWB-transceivers for WBAN applications. A review of recently published CMOS PA designs is reported in this paper with comparison tables listing wideband power amplifiers' performance.</span>

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An Excellent Gain Flatness 3.0–7.0 GHz CMOS PA for UWB Applications

Cited by 44 publications

References 5 publications

A 0.9–3.5 GHz high linearity, good efficiency CMOS broadband power amplifier using stagger tuning technique

A 0.9–3.5 GHz high linearity, good efficiency CMOS broadband power amplifier using stagger tuning technique

A folded current-reused CMOS power amplifier for low-voltage 3.0–5.0 GHz UWB applications

Ultra-wideband CMOS power amplifier for wireless body area network applications: a review

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An Excellent Gain Flatness 3.0–7.0 GHz CMOS PA for UWB Applications

Cited by 44 publications

References 5 publications

A 0.9–3.5 GHz high linearity, good efficiency CMOS broadband power amplifier using stagger tuning technique

A 0.9–3.5 GHz high linearity, good efficiency CMOS broadband power amplifier using stagger tuning technique

A folded current-reused CMOS power amplifier for low-voltage 3.0&#x2013;5.0 GHz UWB applications

Ultra-wideband CMOS power amplifier for wireless body area network applications: a review

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A folded current-reused CMOS power amplifier for low-voltage 3.0–5.0 GHz UWB applications