An efficient VLSI implementation for forward and inverse wavelet transform for JPEG2000

Dimitroulakos, Gregory; Zervas, N.D.; Sklavos, Nicolas; Goutis, C.E.

doi:10.1109/icdsp.2002.1027877

Cited by 9 publications

(17 citation statements)

References 8 publications

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“…2b) consists of a modified delay line that receives two input samples per clock cycle and a separate data-path for high-pass and low-pass filtering in order to produce two subband coefficients per clock cycle. Also as described in [10], the TO filters can work with higher clock frequencies than the corresponding conventional ones. Hence, the throughput of the TO filters is at least twice as much as that of the conventional filters.…”

Section: Article In Pressmentioning

confidence: 98%

“…1. The first was presented in our previous work [10] and hereafter it will be called as throughput optimized (TO) and the second one, called conventional, is presented in [6,8]. The conventional filter architecture (Fig.…”

Section: Article In Pressmentioning

confidence: 99%

“…The 1D-DWT filters architecture employed in the 2D-DWT computation is based on the equations for the 1D-DWT as given in [2] and their detailed architecture is described in [10].There are basically two types of parallel convolutional filters for computing the 1D-DWT which are shown in Fig. 1.…”

Section: Article In Pressmentioning

confidence: 99%

“…The proposed architecture is based on a well-established architecture template presented in [9] where the four conventional filtering units [6,8] were replaced by the four throughput optimized ones presented in [10]. Also adapted to the filters architecture, an intelligent scheduling algorithm based on the line-based algorithm for computing the 2D-DWT is also proposed.…”

Section: Introductionmentioning

confidence: 99%

See 3 more Smart Citations

A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000

et al. 2005

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Section: Article In Pressmentioning

confidence: 98%

Section: Article In Pressmentioning

confidence: 99%

Section: Article In Pressmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000

et al. 2005

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“…Generally, signal processing systems require the inverse wavelet transform processor (IWTP) has small size, low loss, high suppression and low cost in flaw detection, image processing, wireless communication and other fields. Many methods, such as analog circuits, digital circuits and surface acoustic wave (SAW) devices, have been proposed to implement the inverse wavelet transform (IWT) in hardware [1,2,3,4,5,6].…”

Section: Introductionmentioning

confidence: 99%

Design and fabrication of low loss and high suppression monolithic inverse wavelet transform processor

Jiang

Lu²,

Dai

2014

IEICE Electron. Express

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This paper presents a low loss and high suppression monolithic inverse wavelet transform processor (MIWTP) using surface acoustic wave (SAW) devices. New functions for achieving the MIWTP have been derived. Its structure combines a withdrawal weighted single phase unidirectional transducer (SPUDT) with an apodized SPUDT. The experimental device is achieved with the aluminum electrode and the 128 degree rotated Y-cut lithium niobate (LiNbO 3 ) substrate. Measured results demonstrate the center frequency 68.1 MHz, the minimum insertion loss (IL) 5.4 dB, the 3-dB fractional bandwidth 1.3% and the sidelobe suppression over 40 dB.

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A High-Throughput and Memory Efficient 2-D Discrete Wavelet Transform Hardware Architecture for JPEG2000 Standard

Dimitroulakos

Galanis²,

Milidonis³

et al.

2005 IEEE International Symposium on Circuits and Systems

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The design and implementation of an efficient hardware architecture in terms of speed and memory requirements for computing the tile-based Two-Dimensional Forward Discrete Wavelet Transform for the JPEG2000 still image compression standard, is described in this paper. This architecture is derived from a well-established architecture template for calculating the Two-Dimensional Forward Discrete Wavelet Transform. The filters of that template are replaced by our previously published throughput-optimized ones. A proper scheduling algorithm has been developed that it matches to the special features of our filtering units. The performance improvements are due to the throughputoptimized filters. Also, due to the developed scheduling algorithm, reduced memory requirements are achieved when compared with previously published architectures.I.

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An efficient VLSI implementation for forward and inverse wavelet transform for JPEG2000

Cited by 9 publications

References 8 publications

A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000

A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000

Design and fabrication of low loss and high suppression monolithic inverse wavelet transform processor

A High-Throughput and Memory Efficient 2-D Discrete Wavelet Transform Hardware Architecture for JPEG2000 Standard

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