An efficient hardware implementation for motion estimation of AVC standard

Abstract

In the advanced video coding standard (AVC), motion estimation adopts many new features such as variable block size searching, multiple reference frames, motion vector prediction, etc, for enhancing the coding performance. However, the high data dependence and high computation requirement of these new features makes the hardware implementation very complex, especially for real-time applications. Therefore base on the reference software JM9.0, this paper firstly improved the motion estimation algorithm from hardware-oriented viewpoint, and secondly proposed the systolic architecture of improved algorithm. It adopts 2-D systolic arrays, fully supports the AVC's variable block size matching, and can produce 41 motion vectors for one macroblock. Experimental results show that the improved algorithm can avoid the data dependences while with the same coding performance as JM9.0, and the proposed architecture can achieve the real-time requirement for 720x576 picture size at 30 fps with the search range of 65x65.

Robust Motion Compensated Frame Interpolation Using Weight-Overlapped Block Motion Compensation with Variable Block Sizes to Reduce LCD Motion Blurs

“…The average processing time of the proposed method for 10 CIF sequences is 4,746 ms; however, this is the processing time under software implementation. The processing time of variable block size ME realized by dedicated hardware for HD images is fast enough for real-time processing [29,30], so the proposed method can be used for real-time FRUC processing by hardware implementation.…”

Optimizing the H.264/AVC Video Encoder Application Structure for Reconfigurable and Application-Specific Platforms

“…A major effort has been spent on individual blocks of the H.264 codec e.g. DCT ( [33][34][35]) ME ( [36][37][38][39]), and De-blocking Filter ( [40][41][42][43][44]). Instead of targeting one specific component, we have implemented 12 hardware accelerators (see Section 3) for the major computationalintensive parts of the H.264 encoder and used them for evaluating our proposed application structure in the result section.…”