An efficient built‐in error detection methodology with fast page‐oriented data comparison in 3D NAND flash memories

Abstract

This letter presents an efficient built‐in error detection methodology for 3D NAND flash memories, in which fast page‐oriented data comparison and column parallel error detection are firstly proposed. The methodology takes advantage of the characteristics of page buffer to perform fast page‐oriented comparison between test data and reference data. Thanks to that, both fine error detection mode and column parallel error detection mode can be supported for different test scenarios. Analytical results show that it costs about 164.14 μs and 460 ns in fine and column parallel mode respectively to detect a page which is 16 K bytes. Compared with previous work, the error detection time of the proposed column parallel mode is reduced 99.7% for 3D NAND flash memories.