Integrated Broadband Communication Networks and Services 1994
DOI: 10.1016/b978-0-444-81584-2.50026-4
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An Effective-Rate Enforcement Algorithm for ATM Traffic and its Hardware Implementation

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Cited by 6 publications
(14 citation statements)
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“…The ATM traffic shaping mechanism, described in the previous sections, has been designed as a VLSI chip using the ECPD15 CMOS technology of ES2 [8,9] ð1:5 mmÞ: The standard-cell design Figure 6 shows results for the variation of cell transmission rate (TXSEND) as the local buffer is full (VTQEMPTY) according to the basic cell clock (VTCS). We can see the window monitoring size signals for the estimations (TSWINSIZE(0:1)).…”
Section: Implementation Results and Concluding Remarksmentioning
confidence: 99%
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“…The ATM traffic shaping mechanism, described in the previous sections, has been designed as a VLSI chip using the ECPD15 CMOS technology of ES2 [8,9] ð1:5 mmÞ: The standard-cell design Figure 6 shows results for the variation of cell transmission rate (TXSEND) as the local buffer is full (VTQEMPTY) according to the basic cell clock (VTCS). We can see the window monitoring size signals for the estimations (TSWINSIZE(0:1)).…”
Section: Implementation Results and Concluding Remarksmentioning
confidence: 99%
“…Having obtained estimates of the parameters V and T ; the rate from the table by accessing the nearest tabulated point with the smallest R e ; the largest V and the smallest T [7,8]. Here we follow the second approach:…”
Section: The Shaping Mechanism: Algorithmic and System Design Issuesmentioning
confidence: 99%
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