An analysis of false turn-on mechanism on power devices

Abstract

Currently, driving power circuits at high switching frequency is performed in order to downsize and lighten switching power supplies. Along with it, wide band gap semiconductor devices, GaN and SiC, have attracted attention. However, there is a great constrain related to the false turn-on phenomenon produced by gate noise because these wide band gap semiconductor devices have low threshold voltage. If the false turn-on phenomenon occurs, the efficiency of the power supply decreases. Therefore, this paper analyzes the gate noise performance using simulation and experimental tests focusing on the parasitic inductance of the power devices terminals. As a result, it was found that the gate noises can be related to the recovery current of the body diodes. Additionally, this analysis was theorized by the comparison between the experimental results and the theoretical equation using an equivalent circuit.

Impact of BTI-Induced Threshold Voltage Shifts in Shoot-Through Currents From Crosstalk in SiC MOSFETs

“…The method is based on "crosstalk" between devices in a phase leg. Crosstalk simply refers to parasitic turn-ON of a power device due to voltage IEEE POWER ELECTRONICS REGULAR PAPER commutation of the complementing device in the phase leg [29][30][31][32]. The parasitic gate voltage arises due to Miller capacitance feedback that depends on the parasitic gate-drain capacitance CGD capacitance and the gate resistance RG of the device parasitically switched.…”

Analysis of SiC MOSFET d I /d t and its temperature dependence

“…However, SiC MOSFETs are prone to oscillations during switching because of the coupling effects between the variation of drain current (d I D /d t ) and the parasitic inductances from the package design of the power module, which results in voltage overshoot [5, 6], false turn‐on and unreliability [7, 8], and even damage to the devices [9]. With the development of the packaging technology, parasitic inductances are becoming increasingly small, but it cannot be avoided.…”

Analysis of coupled-inductor configuration for an interleaved high step-up converter

“…Moreover, this technique might produce a reduction of the inductor volume because it allows smaller inductance for the input inductors to suppress the input current ripple. On the other hand, integrated magnetics is a well-known technique reported as effective to increase the power density and miniaturize magnetic components [21]- [24]. These techniques are used in order to obtain a novel and improved high step-up power converter with high power density.…”