An Advanced Spread Spectrum Architecture Using Pseudorandom Modulation to Improve EMI in Class D Amplifier

Ming, Xin; Chen, Zao; Zhou, Zucheng; Zhang, Bo

doi:10.1109/tpel.2010.2063440

Cited by 45 publications

(27 citation statements)

References 25 publications

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“…Several techniques to improve the EMI have been proposed to spread the energy of the high-frequency carrier signal used in PWM modulation [14], [15]. However, this comes at the expense of additional power consumption and design complexity.…”

Section: ) Emimentioning

confidence: 99%

A High-Efficiency Self-Oscillating Class-D Amplifier for Piezoelectric Speakers

Colli-Menchi

Sánchez-Sinencio

2015

IEEE Trans. Power Electron.

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The design tradeoffs of the class-D amplifier (CDA) for driving piezoelectric (PZ) speakers are presented, including efficiency, linearity, and electromagnetic interference. An implementation is proposed to achieve high efficiency in the CDA architecture for PZ speakers to extend battery life in mobile devices. A self-oscillating closed-loop architecture is used to obviate the need for a carrier signal generator to achieve low power consumption. The use of stacked-cascode CMOS transistors at the H-bridge output stage provides low input capacitance to allow high switching frequency to improve linearity with high efficiency. Moreover, the CDA monolithic implementation achieves 18 V P P output voltage swing in a low voltage CMOS technology without requiring expensive high-voltage semiconductor devices. The prototype experimental results achieved a minimum THD+N of 0.025%, and a maximum efficiency of 96%. Compared to available CDA for PZ speakers, the proposed CDA achieved higher linearity, lower power consumption, and higher efficiency. a larger silicon area; thus, increasing the cost of the amplifier. Commercial CDA architectures for PZ speakers provide high-voltage outputs using these devices, but the distortion and power consumption is still large [27]- [30].Other switching output stages have been proposed to drive high-voltage capacitive actuators for different applications [31], [32]. Nonetheless, the primary objective of these applications is to deliver the maximum amount of energy at the actuator's resonant point, making them not suitable for audio applications.This work discusses the design tradeoffs of the CDA architecture for driving PZ speakers, especially when low power consumption and high efficiency are desired. An example implementation is proposed to achieve high efficiency and high linearity in the CDA architecture for PZ speakers to extend battery life in mobile devices. The self-oscillating closed-loop architecture is used to obviate the need of a carrier signal generator to achieve high linearity with low power consumption. Moreover, the CDA monolithic implementation is able to provide an 18 V pp output voltage swing in an 1.8 V core-voltage twin-well 11-16 Ω-cm p-type substrate CMOS technology without requiring expensive special high-voltage semiconductor devices. The use of stacked-cascode CMOS transistors at the H-bridge output stage provides low input capacitance to allow high switching frequency to improve linearity without sacrificing the high efficiency. This paper is organized as follows: Section II reviews the PZ speaker details and design considerations for the CDA. Section III discuses the CDA architecture for PZ speakers and its tradeoffs. Section IV presents the measurement results of the monolithic implementation prototype, and Section V concludes the paper. II. PIEZOELECTRIC SPEAKERS A. Structure and operationThe physical structure of a typical PZ speaker is shown in Fig. 2 where a PZ element is attached to a film encased between a front panel and rear panel. The PZ element deflect...

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Section: ) Emimentioning

confidence: 99%

A High-Efficiency Self-Oscillating Class-D Amplifier for Piezoelectric Speakers

Colli-Menchi

Sánchez-Sinencio

2015

IEEE Trans. Power Electron.

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“…This is because of the switching action at high frequencies. This problem is serious which may degrade power supply quality and disturb the operation of sensitive electronic equipment nearby [6].…”

Section: Existing Dsss Architecturesmentioning

confidence: 99%

Implementation of A Low Power Low Complexity VLSI Architecture for DSSS Signal Transmission and Reception

Reddy¹,

Ramarao²,

Savitri³

2012

IOSRJVSP

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In this paper, a new approach to design VLSI architecture for DSSS is proposed and implemented. In this we aimed towards designing a low power and low complexity architecture. An extremely lucid technique is implemented in Generating the Pseudo Random Sequence, which is the principal component in the design. The various blocks of the design like encoder, decoder, linear feedback shift register etc., are realized using low power VLSI components with an ease of low complexity approach. The Design is implemented on XA9536XL CPLD using XILINX ISE simulator and XILINX XST synthesizer. The results reveal that the power consumption, number of slice registers and other combinational circuits are less compared to the existing architectures.

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“…Switching frequency modulation (FM) of the PWM carrier is done by modulating the system clock or the triangle carrier wave. Modulation is done using a triangle pattern in [3], or a uniformly distributed pseudo-random spread spectrum signal in [4] and [5]. These techniques are applicable for both AD and BD modulation.…”

Section: Introductionmentioning

confidence: 99%

EMI Reduction in Class-D Amplifiers by Actively Reducing PWM Ripple

Lokin

Zee

Schinkel³

et al. 2020

IEEE Trans. Circuits Syst. I

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Class-D amplifiers switch high voltages and currents at high frequencies and hence produce electromagnetic interference (EMI). This work presents a technique to reduce the high frequency ripple, which is still present after the output filter. A Class-A ripple reduction amplifier is put in parallel to the output of the Class-D amplifier, each having their own feedback loop with digital filters. High ripple reduction loop gain is achieved at the PWM frequency by using a resonator as digital loop filter. Dissipation in the Class-A amplifier is reduced by using a low common-mode signaling technique. Commonmode and differential-mode switching components at the PWM frequency are reduced by 27 dB and 18 dB respectively. Total system efficiency is 79% at 40 W output power.

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An Advanced Spread Spectrum Architecture Using Pseudorandom Modulation to Improve EMI in Class D Amplifier

Cited by 45 publications

References 25 publications

A High-Efficiency Self-Oscillating Class-D Amplifier for Piezoelectric Speakers

A High-Efficiency Self-Oscillating Class-D Amplifier for Piezoelectric Speakers

Implementation of A Low Power Low Complexity VLSI Architecture for DSSS Signal Transmission and Reception

EMI Reduction in Class-D Amplifiers by Actively Reducing PWM Ripple

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