Amdahl's law in the context of heterogeneous many‐core systems – a survey

Abstract

For over 50 years, Amdahl's Law has been the hallmark model for reasoning about performance bounds for homogeneous parallel computing resources. As heterogeneous, many-core parallel resources continue to permeate into the modern server and embedded domains, there has been growing interest in promulgating realistic extensions and assumptions in keeping with newer use cases. This study aims to provide a comprehensive review of the purviews and insights provided by the extensive body of work related to Amdahl's law to date, focusing on computation speedup. The authors show that a significant portion of these studies has looked into analysing the scalability of the model considering both workload and system heterogeneity in real-world applications. The focus has been to improve the definition and semantic power of the two key parameters in the original model: the parallel fraction (f) and the computation capability improvement index (n). More recently, researchers have shown normal-form and multi-fraction extensions that can account for wider ranges of heterogeneity, validated on many-core systems running realistic workloads. Speedup models from Amdahl's law onwards have seen a wide range of uses, such as the optimisation of system execution, and these uses are even more important with the advent of the heterogeneous many-core era.

Performance Improvement of PLC Channel Estimator and ASCET Equalizer in a FBMC Transmultiplexer Based on a Multi-Core Solution

“…Consequently, the performance or speed-up does not increase as linearly as expected, and, thus, the results match the theoretical speed-up determined by Amdahl's Law [34]. For the 2-ASCET dualcore proposal, it is possible to speed up approximately 84 % of the original version, known as "parallelization factor" f = 0.84 in [34,Eq. (4)], and the acceleration is x2 when using two cores, n = 2 in [34,Eq.…”

“…This aspect is reflected in Amdahl's Law, due to the inter-core synchronization operation time and to the fact that not all the operations can be further parallelized [33]. Consequently, the performance or speed-up does not increase as linearly as expected, and, thus, the results match the theoretical speed-up determined by Amdahl's Law [34]. For the 2-ASCET dualcore proposal, it is possible to speed up approximately 84 % of the original version, known as "parallelization factor" f = 0.84 in [34,Eq.…”

“…In addition, the IPI provides an ideal infrastructure for multi-core applications, although, the write and read accesses to/from the buffers increase the time to process each interrupt. According to Amdahl's Law, the maximum theoretical speed up that it is possible to reach in this application is roughly x2 [34], instead of the expected x4 speed-up, mainly due to the synchronization overhead. For the dual-and quad-core proposals there are stages of the algorithm that cannot be parallelized, such as the FFT calculation, the LS estimation or the inter-core synchronization.…”

“…For the 2-ASCET dualcore proposal, it is possible to speed up approximately 84 % of the original version, known as "parallelization factor" f = 0.84 in [34,Eq. (4)], and the acceleration is x2 when using two cores, n = 2 in [34,Eq. (4)].…”

“…Note that about 16 % of the original version that is not parallelized is due to the inter-core synchronization mechanism. Thus, according with [34,Eq. (4)], the resulting theoretical acceleration is x1.73 for the dual-core case, which is close to the results obtained.…”