Ambipolar Performance Improvement of Dual Material TFET Using Drain Underlap Engineering

Singh, Pooran; Chauhan, Vibhuti; Ray, Deepa; Dash, Sidhartha; Mishra, Guru Prasad

doi:10.1109/edkcon.2018.8770478

Cited by 10 publications

(5 citation statements)

References 13 publications

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“…With a decrease in the tunnelling length between the channel and the drain, the number of electrons that can tunnel from the valence band of the channel into the conduction band of the drain increases. This section discusses the use of work function [32] and drain overlapping engineering [33,34] for suppression of the ambipolar conduction effect on the GAS GAA TFET performance (Figure 2). Figure 6a shows the I D − V gs transfer characteristics of the GAS GAA TFET and optimised GAS GAA TFET.…”

Section: Optimised Gas Gaa Tfetmentioning

confidence: 99%

A Novel Germanium-Around-Source Gate-All-Around Tunnelling Field-Effect Transistor for Low-Power Applications

et al. 2020

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This paper presents a germanium-around-source gate-all-around tunnelling field-effect transistor (GAS GAA TFET). The electrical characteristics of the device were studied and compared with those of silicon gate-all-around and germanium-based-source gate-all-around tunnel field-effect transistors. Furthermore, the electrical characteristics were optimised using Synopsys Sentaurus technology computer-aided design (TCAD). The GAS GAA TFET contains a combination of around-source germanium and silicon, which have different bandgaps. With an increase in the gate-source voltage, band-to-band tunnelling (BTBT) in silicon rapidly approached saturation since germanium has a higher BTBT probability than silicon. At this moment, germanium could still supply current increment, resulting in a steady and steep average subthreshold swing ( S S AVG ) and a higher ON-state current. The GAS GAA TFET was optimised through work function and drain overlapping engineering. The optimised GAS GAA TFET exhibited a high ON-state current ( I ON ) (11.9 μ A), a low OFF-state current ( I OFF ) ( 2.85 × 10 − 9 μ A), and a low and steady S S AVG (57.29 mV/decade), with the OFF-state current increasing by 10 7 times. The GAS GAA TFET has high potential for use in low-power applications.

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Section: Optimised Gas Gaa Tfetmentioning

confidence: 99%

A Novel Germanium-Around-Source Gate-All-Around Tunnelling Field-Effect Transistor for Low-Power Applications

et al. 2020

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“…Recently, L-shaped TFETs have gained attention as they provide the benefit of a high I ON as well as a reduced chip area. Likewise, a variety of work, for example on gate work function engineering [17], dual gate-material [18] and U-shaped TFETs [19], has been done to overcome the aforementioned concerns.…”

Section: Introductionmentioning

confidence: 99%

Interface trap-induced radiofrequency and low-frequency noise analysis under temperature variation of a heterostacked source L-gate tunnel field effect transistor

Das,

Chakraborty,

Borah

2024

Semicond. Sci. Technol.

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This brief exclusively demonstrates a comprehensive analysis of the adverse impact of interface trap charge (ITC) under the influence of temperature variation on a hetero-stacked (HS) source L-gate tunnel field effect transistor (TFET) having SiGe pocket. An investigation of both static and RF characteristics has been carried out. It appears that ITCs situated at the Silicon (Si)/oxide interface fluctuates the flat-band voltage to alter the various analog/RF parameter characteristics. Uniform ITCs are seen to be less susceptible to degradation in device characteristics. The low frequency noise (LFN) analysis has also been investigated considering the impact of different trap distribution (Uniform and Gaussian) and densities which are compared thereafter. Besides, the temperature dependent LFN has been studied under influence of different distributed ITCs which is rarely explored yet. Moreover, a comparative analysis has been done on the device behaviour and LFN characteristics of HS L-gate TFET structures with and without SiGe pocket. The structure with SiGe pocket is found to be insusceptible to noise effects.

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“…The ambipolarity is the conduction of carriers due to the band bending in the vicinity of the channel/drain (C/D) interface. Researchers have reported several techniques such as work-function modulation [10], dielectric engineering [11], use of spacer [12], gate-drain overlap [13], gate-drain underlap [14], and dielectric pocket engineering [15] to reduce ambipolarity. However, each technique has its own set of limitations.…”

Section: Introductionmentioning

confidence: 99%

“…However, each technique has its own set of limitations. Most of these techniques can suppress ambipolarity, but with a noticeable influence on the gateto-drain capacitance, fabrication cost, fabrication complexity, and I on [13][14][15]. For example, a heavily doped pocket at the channel-drain interface reduces the ambipolarity in TFETs but this reduction comes at an increment in gate-to-drain capacitance (C gd ) which, further, degrades the HF performances of TFETs [15].…”

Section: Introductionmentioning

confidence: 99%

A single gate SiGe/Si tunnel FET with rectangular HfO₂ dielectric pocket to improve I _on/I _amb current ratio

Panda

Mishra

Dash

2022

Semicond. Sci. Technol.

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The ambipolar conduction in the tunnel field-effect transistors (TFETs) is considered the primary hindrance in its usage in complimentary digital circuits and low-power applications. The higher ambipolarity puts a serious question on the efficiency of a TFET, which is a result of channel/drain (C/D) tunneling. This further leads to a significant reduction in the current switching ratio (Ion/Iamb). This paper presents an n-type Si0.6Ge0.4/Si heterostructure tunnel field effect transistor (HTFET) with a rectangular dielectric pocket (RDP) to maximize Ion/Iamb current ratio. This has been achieved by suppressing the ambipolarity and improving the on current simultaneously. The existence of Si1-xGex in the source and silicon channel provides improved on current (Ion) with controlled leakage current (Ioff). Similarly, high-k RDP in the drain reduces ambipolar current (Iamb) significantly and thus, exhibits a higher Ion/Iamb ratio. The different parameters such as x-distance from the C/D interface, y-distance from the gate/drain interface, and dielectric constant has been considered to provide a higher Ion/Iamb ratio of 〖6.30×10〗^7. The effect of the presence of interface trap charges and variable Ge mole fraction has been studied. The current ratio can be further improved to 〖4.0×10〗^12 with an underlap length of 25 nm.

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Ambipolar Performance Improvement of Dual Material TFET Using Drain Underlap Engineering

Cited by 10 publications

References 13 publications

A Novel Germanium-Around-Source Gate-All-Around Tunnelling Field-Effect Transistor for Low-Power Applications

A Novel Germanium-Around-Source Gate-All-Around Tunnelling Field-Effect Transistor for Low-Power Applications

Interface trap-induced radiofrequency and low-frequency noise analysis under temperature variation of a heterostacked source L-gate tunnel field effect transistor

A single gate SiGe/Si tunnel FET with rectangular HfO₂ dielectric pocket to improve I _on/I _amb current ratio

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Ambipolar Performance Improvement of Dual Material TFET Using Drain Underlap Engineering

Cited by 10 publications

References 13 publications

A Novel Germanium-Around-Source Gate-All-Around Tunnelling Field-Effect Transistor for Low-Power Applications

A Novel Germanium-Around-Source Gate-All-Around Tunnelling Field-Effect Transistor for Low-Power Applications

Interface trap-induced radiofrequency and low-frequency noise analysis under temperature variation of a heterostacked source L-gate tunnel field effect transistor

A single gate SiGe/Si tunnel FET with rectangular HfO2 dielectric pocket to improve I on/I amb current ratio

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A single gate SiGe/Si tunnel FET with rectangular HfO₂ dielectric pocket to improve I _on/I _amb current ratio