A low-cost 0.7 tum gate power pseudoinorplhic high-electron-mobility transistor (PHEMT) process wsas developed. PHEMT structure, etch profile and passivation conditions wxere optimized to yield a device with high breakdown combined with minimal gate lag. A 2 mm PHEMT exhibits dc Id. of 300 mA/mm, 1,,. of 500 mAmrnm, peak Gm of 360 mS/mm and 3-tenninal breakdown voltage of 13 V. At 0.85 GHz such a device exhibits a record output power density of 630 mW/mmn at V'4=5.8 V and 290 mW/mm at Vd=3.4 V with associated PAE of 60%.
INTRODUCTIONStringent specifications of modern wireless systems require development of new semniconductor technologies to address design challenges at the devicc level. Modem transistors for personal communication systems have to be lhiglhly efficient and deliver high power at low supply voltages. PHEMT devices were previously found to meet these criteria [ 1]-[4J. High-volumiie processing of suci devices at low-cost without sacrificing their performance is lhowever a challenge. This is partially attributed to the limited ability to control the surface states at AlGaAs and GaAs interfaces witl silicon nitride passivation. These surface states strongly effect PHEMT breakdown and transient