AES hardware implementation in FPGA for algorithm acceleration purpose

Gielata, A.; Russek, Pawel Grzegorz; Wiatr, K.

doi:10.1109/icses.2008.4673377

Cited by 31 publications

(10 citation statements)

References 2 publications

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“…Moreover, hardware acceleration can be used for keeping energy consumption and throughput values at a reasonable level when executing public-key cryptography algorithms [73]. Furthermore, the use of specific hardware can also speed up the execution of cryptographic algorithms such as hash algorithms [74] or block ciphers [75].…”

Section: Energy Efficient Security Mechanismsmentioning

confidence: 99%

Green IoT and Edge AI as Key Technological Enablers for a Sustainable Digital Transition towards a Smart Circular Economy: An Industry 5.0 Use Case

Fraga‐Lamas

Lopes

Fernández‐Caramés

2021

Sensors

174

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Internet of Things (IoT) can help to pave the way to the circular economy and to a more sustainable world by enabling the digitalization of many operations and processes, such as water distribution, preventive maintenance, or smart manufacturing. Paradoxically, IoT technologies and paradigms such as edge computing, although they have a huge potential for the digital transition towards sustainability, they are not yet contributing to the sustainable development of the IoT sector itself. In fact, such a sector has a significant carbon footprint due to the use of scarce raw materials and its energy consumption in manufacturing, operating, and recycling processes. To tackle these issues, the Green IoT (G-IoT) paradigm has emerged as a research area to reduce such carbon footprint; however, its sustainable vision collides directly with the advent of Edge Artificial Intelligence (Edge AI), which imposes the consumption of additional energy. This article deals with this problem by exploring the different aspects that impact the design and development of Edge-AI G-IoT systems. Moreover, it presents a practical Industry 5.0 use case that illustrates the different concepts analyzed throughout the article. Specifically, the proposed scenario consists in an Industry 5.0 smart workshop that looks for improving operator safety and operation tracking. Such an application case makes use of a mist computing architecture composed of AI-enabled IoT nodes. After describing the application case, it is evaluated its energy consumption and it is analyzed the impact on the carbon footprint that it may have on different countries. Overall, this article provides guidelines that will help future developers to face the challenges that will arise when creating the next generation of Edge-AI G-IoT systems.

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Section: Energy Efficient Security Mechanismsmentioning

confidence: 99%

Green IoT and Edge AI as Key Technological Enablers for a Sustainable Digital Transition towards a Smart Circular Economy: An Industry 5.0 Use Case

Fraga‐Lamas

Lopes

Fernández‐Caramés

2021

Sensors

174

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“…AES algorithm throughput can be increased by using folded parallel architecture [13].Through put can be further increased by introducing 2-slow retiming technique [14].A light weight Mix Column structure can be designed using [16]. By using X time based MixColumn transformation the speed circuit can be increased along the reduced area [17][18][19][20][21][22][23][24][25].…”

Section: 1 Related Workmentioning

confidence: 99%

FPGA implementation of AES algorithm for high speed applications

Priya

Karthigaikumar

Teja

2021

Analog Integr Circ Sig Process

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The main objective of this paper is to design and implement High throughput, area efficient AES encryption algorithm on FPGA for security purposes. The high speed and area efficiency is achieved by designing an area efficient and high throughput structural S-Box architecture for AES encryption process. A combinational logic circuit based Rijndael Low area high speed S-Box is designed. The results compared with conventional S-Box. The speed and propagation delay of the S-Box are calculated for the designed S-Box. The proposed S-Box is used in AES encryption process. To further increase the speed of the encryption process efficient structure of Mix column is also proposed. This Mix column structure is used to achieve high throughput. The proposed S-Box and Mix Column are used in AES encryption. This proposed AES structure is implemented in FPGA Virtex 5.The results are compared with the conventional implementation.

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“…Advanced Encryption Standard (AES), also know as Rijndael, is the most popular encryption technique that researches have implemented in FPGAs, with 510 documents. These implementations have been made to increase the encryption speed [406][407][408][409][410], generate small footprint and cheap designs [167,411,412], test the encryption against fault injections/attacks [413,414] and to improve the fault detection/tolerance systems [366,415,416]. Elliptic Curve Cryptography (ECC) is increasingly used in practice to instantiate public-key cryptography protocols, based on the algebraic structure of elliptic curves over finite fields [417].…”

Section: Cryptography Techniquesmentioning

confidence: 99%

Field Programmable Gate Array Applications—A Scientometric Review

2019

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Field Programmable Gate Array (FPGA) is a general purpose programmable logic device that can be configured by a customer after manufacturing to perform from a simple logic gate operations to complex systems on chip or even artificial intelligence systems. Scientific publications related to FPGA started in 1992 and, up to now, we found more than 70,000 documents in the two leading scientific databases (Scopus and Clarivative Web of Science). These publications show the vast range of applications based on FPGAs, from the new mechanism that enables the magnetic suspension system for the kilogram redefinition, to the Mars rovers’ navigation systems. This paper reviews the top FPGAs’ applications by a scientometric analysis in ScientoPy, covering publications related to FPGAs from 1992 to 2018. Here we found the top 150 applications that we divided into the following categories: digital control, communication interfaces, networking, computer security, cryptography techniques, machine learning, digital signal processing, image and video processing, big data, computer algorithms and other applications. Also, we present an evolution and trend analysis of the related applications.

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AES hardware implementation in FPGA for algorithm acceleration purpose

Cited by 31 publications

References 2 publications

Green IoT and Edge AI as Key Technological Enablers for a Sustainable Digital Transition towards a Smart Circular Economy: An Industry 5.0 Use Case

Green IoT and Edge AI as Key Technological Enablers for a Sustainable Digital Transition towards a Smart Circular Economy: An Industry 5.0 Use Case

FPGA implementation of AES algorithm for high speed applications

Field Programmable Gate Array Applications—A Scientometric Review

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