Advanced wafer thinning technologies to enable multichip packages

Abstract

Wafer thinning for advanced packaging methods has gained importance as demand has increased for memory cards, portable computing systems, multiple chip packages (MCPs), and other applications that require thin integrated circuits (ICs). This paper gives an overview of the different industrial wafer thinning techniques-backgrind, poligrind, dry mechanical polishing, chemical mechanical polishing (CMP), wet etch, dry etch, and dice before grind (DBG)-and the challenges encountered during thinning of wafers to less than 100µm. Some reliability issues have also been investigated, including die strength and subsurface damage associated with these processes and mechanical properties, such as surface roughness and wafer warp.

Ultrathin Wafer Pre-Assembly and Assembly Process Technologies: A Review

“…5,12,[14][15][16]18,20,21,27,42,86,89,90,137,143,144 In the DBG process, die singulation occurs during grinding instead of dicing. In the DBG process flow for ultrathin dies, 14,42,84,89,143 first a wafer is partially diced from its frontside to the desired final die thickness by blade dicing, laser scribing, wet etching, plasma etching, or a combination of these ( Figure 40).…”

“…The damage layer on the wafer backside after backgrinding causes wafer strength decrease, wafer warpage, and will subsequently affect the mechanical integrity of the die. 9,[12][13][14][15][16][17][18][19][20][21][22][23][24][25][26][27]59 This has necessitated a post-grinding treatment process to remove the wafer backside damage and residual stresses, especially for wafers below 100 mm thickness. Several post-grinding treatment were developed for this purpose: chemical mechanical polishing (CMP), 9,[12][13][14][15][16]19,20,25,[27][28][29][30][31]111,128 wet chemical etching, 9,12,13,16,18,19,25,27,34,35,89,90,111,114 plasma etching, …”

“…Several post-grinding treatment were developed for this purpose: chemical mechanical polishing (CMP), 9,[12][13][14][15][16]19,20,25,[27][28][29][30][31]111,128 wet chemical etching, 9,12,13,16,18,19,25,27,34,35,89,90,111,114 plasma etching, 9,[12][13][14][15][18][19][20][21]23,25,27,[37][38][39][40][41]111,122 and dry polishing. 9,12,14,…”

Thin silicon wafer processing and strength characterization

“…The grind damage can lead to a number of problems, including increased wafer bow and reduced fracture strength (see below). So for thin wafers (>150μm ), a damage removal step is required after fine grind [22][23][24]. There are four basic options for damage removal; chemical mechanical polish (CMP), dry polish, wet etch, or dry etch [22,23].…”

A process model of wafer thinning by diamond grinding

“…The thickness of patterned thin wafers of diameter 200/300 mm for packaging continues to reduce about 5 m annually as reported by the International Technology Roadmap for Semiconductors (ITRS, 2006) (SIA, 2006). The thinning technologies of patterned wafers include diamond grinding, polishing or etching (Annette, 2006;Cheong and Teo, 2002;Sandireddy and Jiang, 2005;Hendrix et al, 2000). The wafer thinning is accomplished after the photolithography process of the IC die pattern over several layers on the front side of the wafer.…”