2016 IEEE 2nd Annual Southern Power Electronics Conference (SPEC) 2016
DOI: 10.1109/spec.2016.7846073
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Advanced resampling techniques for PWM amplifiers in real-time applications

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Cited by 3 publications
(6 citation statements)
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“…5 a shows the response of the modulator for a carrier frequency of 8 kHz and resampling frequency of 50.4 kHz, which represents a 3.15 times increase when compared to the 16 kHz sampling frequency that would be used in conventional asymmetrical regular PWM. Note that the experimental data show excellent agreement with the predicted theoretical magnitude and phase responses [5]. It should also be noted that this analysis extends well beyond the carrier frequency of 8 kHz, which is possible due to the carrier frequency harmonic cancellation properties of multi‐level phase‐shifted carrier PWM, and the resampling process.…”
Section: Resultssupporting
confidence: 68%
See 1 more Smart Citation
“…5 a shows the response of the modulator for a carrier frequency of 8 kHz and resampling frequency of 50.4 kHz, which represents a 3.15 times increase when compared to the 16 kHz sampling frequency that would be used in conventional asymmetrical regular PWM. Note that the experimental data show excellent agreement with the predicted theoretical magnitude and phase responses [5]. It should also be noted that this analysis extends well beyond the carrier frequency of 8 kHz, which is possible due to the carrier frequency harmonic cancellation properties of multi‐level phase‐shifted carrier PWM, and the resampling process.…”
Section: Resultssupporting
confidence: 68%
“…One method by which the performance of true natural sampling can be approached using a digital controller is to increase the rate at which the effective modulating signal is updated, which is referred to as resampled PWM [4]. If constraints such as control law calculation time or analogue‐to‐digital conversion (ADC) hardware limit the rate at which the modulating signal can be updated, a first‐order hold (FOH) algorithm can be used to realise additional improvements in the delay and harmonic performance of the modulator [5]. Substantial software calculations are necessary if this method is implemented on a typical microcontroller, however, and these can compromise the performance benefits.…”
Section: Introductionmentioning
confidence: 99%
“…The control delay and the dissipative region for single-valley sampling PWM with the update instant shift (SVS_UIS) are given in ( 19)- (20). The control delay for the SVS_UIS PWM is a piecewise function, which jeopardizes the system stability when the duty cycle is smaller than the critical duty cycle.…”
Section: ) With Sampling Instant Shiftmentioning
confidence: 99%
“…In order to suppress the aliasing, various repetitive filters are proposed in DC-DC and DC-AC converters, where the introduced phase lag is the main optimization goal [13][14][15][16]. Another switching ripple suppression method is to change the sampling process or the carrier, but the feasibility should be further investigated [17][18][19][20].…”
Section: Introductionmentioning
confidence: 99%
“…Second, by replacing the zero-order hold with first-order hold in the sampling process, the modulation signal is more like a continuous signal using multi-update PWM. The arbitrary sampling rate can be used with improved harmonic performance, linearity and phase delay compared with zero-order hold [30][31]. But first-order hold based sampler is still new, and the small signal stability analysis and controller design need to be further researched.…”
Section: Introductionmentioning
confidence: 99%