2018
DOI: 10.25103/jestr.113.25
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Advanced MOSFET Technologies for Next Generation Communication Systems - Perspective and Challenges: A Review

Abstract: In this review, authors have retrospect the state-of-art dimension scaling and emerging other non-conventional MOSFET structures particularly, the Double-Gate (DG) MOSFET and Cylindrical Surrounding Double-Gate (CSDG) MOSFET. These are presented for the future devices to reduce the short channel effects for the next generation communication system as the dimension of device approaches to the nanometer regime. The discussion on advantages and compact modeling approaches of both the MOSFETs have been presented. … Show more

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Cited by 16 publications
(5 citation statements)
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“…V GS ≤ V TH . After providing V GS ≥ V TH , surface potential starts increasing resulting in increase in injection electron exponentially (movement of electron is from source to body in case of N-type channel and movement of electron from body to source in case of P-type channel) is seen because of increase in energy level of electrons [16][17][18][19][20][21][22].…”
Section: Restrictions Imposed By Electron Drift Characteristicsmentioning
confidence: 99%
“…V GS ≤ V TH . After providing V GS ≥ V TH , surface potential starts increasing resulting in increase in injection electron exponentially (movement of electron is from source to body in case of N-type channel and movement of electron from body to source in case of P-type channel) is seen because of increase in energy level of electrons [16][17][18][19][20][21][22].…”
Section: Restrictions Imposed By Electron Drift Characteristicsmentioning
confidence: 99%
“…Process and design advancements are ongoing both domestically and internationally, such as the lowthreshold N+P dual MOS tube irradiation reinforcement design and process technology [1]. To address the short-channel effect in communication systems, emerging non-conventional MOSFET architectures, including dual gate (DG) MOSFETs and cylindrical-surrounded dual gate (CSDG) MOSFETs, have been proposed [2]. Techniques to increase linearity have been proposed, including deep N-wells, second harmonic short circuits, multi-gate transistor compensation, PMOS tube compensation, NMOS tube compensation, common gate tube gate capacitance compensation, and others [3].…”
Section: Introductionmentioning
confidence: 99%
“…The capacitor is without the constraints of high resistivity and optical absorption from the use of a metal current spreading layer. The physics of using a capacitor layer for accumulation or depletion of charges through band bending is analogous to the gate bias of a field effect transistor (FET) [18], [19]. Integration of a capacitor can allow for additional utilization of band bending to aid in hole injection, while the p-contact still acts to forward bias the diode and as the steady-state source of holes.…”
Section: Introductionmentioning
confidence: 99%