Adiabatic quantum-flux-parametron boosters for long interconnection and large fanouts

Abstract

Adiabatic quantum flux parametron (AQFP) is energy-efficient superconducting logic that operates with zero static energy consumption and extremely small dynamic energy consumption thanks to the adiabatic switching of the logic gates. One drawback in AQFP logic circuits is the wire length and fan-out limitations because of the low driving ability of the logic gates, which results in a large circuit area and significant latency. In the present study, we propose AQFP boosters with high driving ability. Two types of AQFP boosters are proposed: one is composed of a parallel connection of AQFP buffers, and the other uses multistage buffers driven by one excitation clock. We evaluated the maximum wire length of the proposed boosters by circuit simulations, including thermal noises, and found that the maximum wire length is 3.9 mm for fan-out one and 1 mm for fan-out four. We implemented the boosters and demonstrated their correct operations at low-speed tests. We also demonstrated a 5-to-31 decoder using the proposed boosters. It was shown that the circuit area, latency, and energy consumption were improved by about 30% compared to the design without the boosters.

Optimisation Challenge for a Superconducting Adiabatic Neural Network That Implements XOR and OR Boolean Functions

“…It should be noted that, even in the development of such simple neural networks, we faced a significant signal decay problem. For larger neural networks, the solution may imply an addition of magnetic flux amplifiers (boosters), well-known in adiabatic superconducting logic [57]. The utilisation of an analogue-digital (and, apparently, opticalsuperconducting) approach for the network implementation is another option.…”

“…Previously, we presented the concept of an adiabatic interferometer-based superconducting neuron [47][48][49], capable of operating in classical and quantum modes with ultra-low energy dissipation per operation (in the zJ range) [50][51][52][53][54][55][56][57]. The development of an adiabatic perceptron requires the realisation of a large number of connections between neurons via superconducting synapses [47].…”

Low clock skew superconductor adiabatic quantum-flux-parametron logic circuits based on grid-distributed blocks

“…In figure 4(b), we illustrate the schematic of local block-1 to reveal the functionality. Four data currents are provided as inputs for this block, of which IN 1 is externally applied to the chip and is then quadruplicated on-chip by an output current boosted 1-to-4 AQFP splitter [24] The test circuit is designed and fabricated by using the AIST 4-metal layer 10 kA cm −2 Nb high-speed standard process [16] for experimental validation, where the parameters of AQFP cells come from previous studies [16,24,25]. A micrograph of the fabricated chip is shown in figure 5.…”