Adiabatic Quantum-Flux-Parametron: A Tutorial Review

Takeuchi, Naoki; Yamae, Taiki; Ayala, Christopher L.; Suzuki, Hideo; Yoshikawa, Nobuyuki

doi:10.1587/transele.2021sep0003

Cited by 20 publications

(11 citation statements)

References 98 publications

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“…Consequently, we can design compact superconducting circuits using SC. Previously, superconducting SC-based circuits for deep-learning processing [6] using Adiabatic Quantum-Flux-Parametron (AQFP) [7] and SC-like RSFQ multiplication and matrix multiplication circuits [8] [9] have been proposed. In this paper, we utilize the latching function of RSFQ circuits for reduction of gates in SC circuit design.…”

Section: Introductionmentioning

confidence: 99%

Compact Stochastic Computing Circuits Using the Latching Function of RSFQ Circuits for Computing Polynomials

Wada

Kito²

2022

J. Phys.: Conf. Ser.

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Stochastic computing (SC) is a method of expressing a numerical value by the appearance ratio of 1 in a bitstream to perform an operation. Rapid single flux quantum (RSFQ) circuits can handle SC naturally and operate at ultra-high speed. RSFQ SC circuits are suitable for applications tolerating error. This paper presents a design method of RSFQ SC circuits to calculate polynomials. Using the proposed design method, an internal circuit is designed to feed bitstreams of coefficients from bitstreams of constant to reduce large stochastic number generators. The method inserts storage elements to reduce correlations of signals, and thereby reduce the calculation error of the circuit. Additionally, it minimizes the number of inserted D flip-flops utilizing the latching function of gate inputs of RSFQ logic gates.

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Section: Introductionmentioning

confidence: 99%

Compact Stochastic Computing Circuits Using the Latching Function of RSFQ Circuits for Computing Polynomials

Wada

Kito²

2022

J. Phys.: Conf. Ser.

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“…In recent years, we have been developing adiabatic quantum-flux-parametron (AQFP) logic 17 , 18 . The AQFP is an energy-efficient logic device based on the quantum flux parametron 19 , 20 that can operate with extremely small energy dissipation near the thermodynamic limit 21 due to an energy-efficient switching scheme, adiabatic switching 22 – 24 .…”

Section: Introductionmentioning

confidence: 99%

“…Furthermore, since a bitstream generated by a PRNG has a finite length, the seed (i.e., initial state) of each PRNG needs to be carefully selected to avoid correlation between bitstreams 16 , which can adversely affect the accuracy of computation. Therefore, to implement alternative computing, logic devices that can generate uncorrelated true random bitstreams in an energy-and hardware-efficient manner are required.In recent years, we have been developing adiabatic quantum-flux-parametron (AQFP) logic 17,18 . The AQFP is an energy-efficient logic device based on the quantum flux parametron 19,20 that can operate with extremely small energy dissipation near the thermodynamic limit 21 due to an energy-efficient switching scheme, adiabatic switching [22][23][24] .…”

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confidence: 99%

Scalable true random number generator using adiabatic superconductor logic

Luo

Chen

Yoshikawa

et al. 2022

Sci Rep

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Alternative computing such as stochastic computing and bio-inspired computing holds promise for overcoming the limitations of von Neumann computers. However, one difficulty in the implementation of such alternative computing is the need for a large number of random bits at the same time. To address this issue, we propose a scalable true-random-number generating scheme that we refer to as XORing shift registers (XSR). XSR generates multiple uncorrelated true random bitstreams using only two true random number generators as entropy sources and can thus be implemented by a variety of logic devices. Toward superconducting alternative computing, we implement XSR using an energy-efficient superconductor logic family, adiabatic quantum-flux-parametron (AQFP) logic. Furthermore, to demonstrate its performance, we design and observe an AQFP-based XSR circuit that generates four random bitstreams in parallel. The results of the experiment confirm that the bitstreams generated by the XSR circuit exhibit no autocorrelation and that there is no correlation between the bitstreams.

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“…Superconductor Josephson logic families, such as rapid single-flux-quantum (RSFQ) logic [1] and its energyefficient variants [2,3], can operate with much smaller energy dissipation than that of conventional semiconductor circuits and are thus promising technology for applications requiring high energy efficiency: low-power microprocessors [4][5][6], readout circuits for superconducting detectors [7][8][9][10], and interface circuits for superconducting qubits [11,12]. Among various Josephson logic families, adiabatic quantum-flux-parametron (AQFP) logic [13,14] exhibits extremely high energy-efficiency. Due to adiabatic switching [15][16][17], AQFP circuits can operate with a small energy dissipation of approximately 10 −21 J per junction at a 5 GHz clock frequency [18], which is much smaller than that of conventional Josephson logic families (~ 10 −19 J).…”

Section: Introductionmentioning

confidence: 99%

“…Due to adiabatic switching [15][16][17], AQFP circuits can operate with a small energy dissipation of approximately 10 −21 J per junction at a 5 GHz clock frequency [18], which is much smaller than that of conventional Josephson logic families (~ 10 −19 J). We have developed and demonstrated various AQFP circuits to show the potential to be widely used for future information and communication technology [14].…”

Section: Introductionmentioning

confidence: 99%

Low-Latency Adiabatic Quantum-Flux-Parametron Circuit Integrated With a Hybrid Serializer/Deserializer

et al. 2022

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Adiabatic quantum-flux-parametron (AQFP) logic is an ultra-low-power superconductor logic family. AQFP logic gates are powered and clocked by dedicated clocking schemes using ac excitation currents to implement an energy-efficient switching process, adiabatic switching. We have proposed a lowlatency clocking scheme, delay-line clocking, and demonstrated basic AQFP logic gates. In order to test more complex circuits, a serializer/deserializer (SerDes) should be incorporated into the AQFP circuit under test, since the number of input/output (I/O) cables is limited by equipment. Therefore, in the present study we propose and develop a novel SerDes for testing delay-line-clocked AQFP circuits by combining AQFP and rapid single-flux-quantum (RSFQ) logic families, which we refer to as the AQFP/RSFQ hybrid SerDes. The hybrid SerDes comprises RSFQ shift registers to facilitate the data storage during serial-toparallel and parallel-to-serial conversion. Furthermore, all the component circuits in the hybrid SerDes are clocked by the identical excitation current to synchronize the AQFP and RSFQ parts. We fabricate and demonstrate a delay-line-clocked AQFP circuit (8-to-3 encoder, which is the largest delay-line-clocked circuit ever designed) integrated with the hybrid SerDes at 4.2 K up to 4.5 GHz. Our measurement results indicate that the hybrid SerDes enables the testing of delay-line-clocked AQFP circuits with only a few I/O cables and is thus a powerful tool for the development of very large-scale integration AQFP circuits.

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Adiabatic Quantum-Flux-Parametron: A Tutorial Review

Cited by 20 publications

References 98 publications

Compact Stochastic Computing Circuits Using the Latching Function of RSFQ Circuits for Computing Polynomials

Compact Stochastic Computing Circuits Using the Latching Function of RSFQ Circuits for Computing Polynomials

Scalable true random number generator using adiabatic superconductor logic

Low-Latency Adiabatic Quantum-Flux-Parametron Circuit Integrated With a Hybrid Serializer/Deserializer

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