Adiabatic CMOS gate and adiabatic circuit design for low-power applications

Design of two-phase sinusoidal power clock and clocked transmission gate adiabatic logic circuit

“…But in fact, adiabatic circuits which can charge and discharge the output loads in a fully adiabatic manner only have the adiabatic energy consumption, and this adiabatic energy consumption is very small, that is to say, R is very small (for instance, when CTGAL circuit of the following text is supplied by the sinusoidal clock whose amplitude and period are 2.5V and 50ns respectively, the value of R approximates 4 9.11 10 ).…”

“…resistances, can be largely reduced or avoided. At present, many literatures [2][3][4][5][6] have presented different design schemes of adiabatic circuits, but they have not given report on how to generate their power clocks, so the practicality of these adiabatic circuits may be questioned. To strengthen the practicality of the adiabatic circuit designed, this paper first investigates how to use the resonant tank that is similar to the series-wound structure of Resistance-Inductor-Capacitance (RLC) circuit using the DC power supply to generate a sine wave, and further designs the two-phase sinusoidal power clock generator based on it.…”

“…Although popular approaches to their low-power design are to reduce the supply voltage, the load capacitances of gates and the switching activity [1] , the energy saving obtained is still limited. Instead of using a DC power supply, adiabatic CMOS circuits are driven by Alternating Current (AC) power supplies [1][2][3][4][5][6][7][8][9][10] . In this way, the resonant tank is formed by the inductor in the 1 power clock generator and the node capacitances in the adiabatic circuit [2] to make energy transmission become magnetic energy → electric energy → magnetic energy, so the charge of the node capacitances can be recycled to achieve power recovery, and the irreversible energy conversion from electric energy to heat caused by dissipative elements, i.e.…”