Addressing the Metric Challenge: Evolved versus Traditional Fault Tolerant Circuits

Haddow, Pauline C.; Hartmann, Morten; Djupdal, A.

doi:10.1109/ahs.2007.22

Cited by 6 publications

(6 citation statements)

References 18 publications

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“…Such a metric provides evolution with more information about practical solutions and thus supports evolution of solutions. However, as shown in [44], since the traditional metric is designed with traditional design techniques in mind and the EH metric is designed with evolution in mind, the metrics favour the design technique for which the metric was designed. As such, a comparison is difficult.…”

Section: Measurementsmentioning

confidence: 99%

Challenges of evolvable hardware: past, present and the path to a promising future

Haddow

Tyrrell

2011

Genet Program Evolvable Mach

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Nature is phenomenal. The achievements in, for example, evolution are everywhere to be seen: complexity, resilience, inventive solutions and beauty. Evolvable Hardware (EH) is a field of evolutionary computation (EC) that focuses on the embodiment of evolution in a physical media. If EH could achieve even a small step in natural evolution's achievements, it would be a significant step for hardware designers. Before the field of EH began, EC had already shown artificial evolution to be a highly competitive problem solver. EH thus started off as a new and exciting field with much promise. It seemed only a matter of time before researchers would find ways to convert such techniques into hardware problem solvers and further refine the techniques to achieve systems that were competitive with or better than human designs. However, 15 years on-it appears that problems solved by EH are only of the size and complexity of that achievable in EC 15 years ago and seldom compete with traditional designs. A critical review of the field is presented. Whilst highlighting some of the successes, it also considers why the field is far from reaching these goals. The paper further redefines the field and speculates where the field should go in the next 10 years.

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Section: Measurementsmentioning

confidence: 99%

Challenges of evolvable hardware: past, present and the path to a promising future

Haddow

Tyrrell

2011

Genet Program Evolvable Mach

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“…A fitness function was designed that ensures that a fully functioning circuit always scores higher than a circuit that does not function 100% correctly. This function is shown in equation (5). As shown, as long as the functionality is not 100% (f ham is not 1.0), the R ehw_gate part of the fitness function does not contribute to the fitness value.…”

Section: Larger Gate Reliability Experimentsmentioning

confidence: 99%

“…Further work [5], also looked at the reliability metrics themselves and how they compare and may be applied in the context of traditional and evolved designs. As such, none of this work explicitly searched for redundancy structures and the goal herein is to find ways to either implicitly or explicitly specify a search leading to redundancy structures.…”

Section: Single Fault Experimentsmentioning

confidence: 99%

Evolving Redundant Structures for Reliable Circuits - Lessons Learned

Djupdal

Haddow

2007

Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007)

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Fault Tolerance is an increasing challenge for integrated circuits due to semiconductor technology scaling. This paper looks at how artificial evolution may be tuned to the creation of novel redundancy structures which may be applied to meet this challenge. However, as these structures are unknown it is a challenge in itself to tune evolution to create them. As such, no solution has yet been found. This paper provides a discussion about the issues addressed and experiments conducted and thus provides an overview of the lessons learned in this work.

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“…The related literature spans this area from offline evolution of fault-tolerant circuits able to withstand defects in silicon [3] without increasing circuit's size significantly [4] or compensating supply voltage drifts [5] by recurrent re-evolution after a series of deteriorating events as the wide-band temperature changes or radiation beams treatments [6,7].…”

Section: Introductionmentioning

confidence: 99%

Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture

Knieper

Kaufmann

Glette

et al. 2010

Evolvable Systems: From Biology to Hardware

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Abstract. The evolvable hardware paradigm facilitates the construction of autonomous systems that can adapt to environmental changes and degrading effects in the computational resources. Extending these scenarios, we study the capability of evolvable hardware classifiers to adapt to intentional run-time fluctuations in the available resources, i.e., chip area, in this work. To that end, we leverage the Functional Unit Row (FUR) architecture, a coarse-grained reconfigurable classifier, and apply it to two medical benchmarks, the Pima and Thyroid data sets from the UCI Machine Learning Repository. We show that FUR's classification performance remains high during changes of the utilized chip area and that performance drops are quickly compensated for. Additionally, we demonstrate that FUR's recovery capability benefits from extra resources.

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Addressing the Metric Challenge: Evolved versus Traditional Fault Tolerant Circuits

Abstract: Abstract

Cited by 6 publications

References 18 publications

Challenges of evolvable hardware: past, present and the path to a promising future

Challenges of evolvable hardware: past, present and the path to a promising future

Evolving Redundant Structures for Reliable Circuits - Lessons Learned

Coping with Resource Fluctuations: The Run-time Reconfigurable Functional Unit Row Classifier Architecture

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