Adaptive WTA With an Analog VLSI Neuromorphic Learning Chip

Häfliger, Philipp

doi:10.1109/tnn.2006.884676

Cited by 59 publications

(37 citation statements)

References 35 publications

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“…This device, thanks to its spike-based plasticity mechanisms, can be used in distributed multichip AER systems as a general purpose learning and classification module. VLSI implementations of spike-based learning systems have been previously proposed [15]- [21], but they either lack the combined memory encoding and memory preservation features of the spike-based plasticity mechanism implemented in this device, or cannot cope with highly correlated patterns as efficiently as the system described here. A recent alternative VLSI implementation of the same plasticity mechanism described in this paper has been proposed in [22].…”

Section: Hardware Implementationmentioning

confidence: 99%

Real-Time Classification of Complex Patterns Using Spike-Based Learning in Neuromorphic VLSI

Mitra

Fusi

Indiveri

2009

IEEE Trans. Biomed. Circuits Syst.

193

152

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Real-time classification of patterns of spike trains is a difficult computational problem that both natural and artificial networks of spiking neurons are confronted with. The solution to this problem not only could contribute to understanding the fundamental mechanisms of computation used in the biological brain, but could also lead to efficient hardware implementations of a wide range of applications ranging from autonomous sensory-motor systems to brain-machine interfaces. Here we demonstrate real-time classification of complex patterns of mean firing rates, using a VLSI network of spiking neurons and dynamic synapses which implement a robust spike-driven plasticity mechanism. The learning rule implemented is a supervised one: a teacher signal provides the output neuron with an extra input spike-train during training, in parallel to the spike-trains that represent the input pattern. The teacher signal simply indicates if the neuron should respond to the input pattern with a high rate or with a low one. The learning mechanism modifies the synaptic weights only as long as the current generated by all the stimulated plastic synapses does not match the output desired by the teacher, as in the perceptron learning rule. We describe the implementation of this learning mechanism and present experimental data that demonstrate how the VLSI neural network can learn to classify patterns of neural activities, also in the case in which they are highly correlated. Abstract-Real-time classification of patterns of spike trains is a difficult computational problem that both natural and artificial networks of spiking neurons are confronted with. The solution to this problem not only could contribute to understanding the fundamental mechanisms of computation used in the biological brain, but could also lead to efficient hardware implementations of a wide range of applications ranging from autonomous sensory-motor systems to brain-machine interfaces. Here we demonstrate real-time classification of complex patterns of mean firing rates, using a VLSI network of spiking neurons and dynamic synapses which implement a robust spike-driven plasticity mechanism. The learning rule implemented is a supervised one: a teacher signal provides the output neuron with an extra input spike-train during training, in parallel to the spike-trains that represent the input pattern. The teacher signal simply indicates if the neuron should respond to the input pattern with a high rate or with a low one. The learning mechanism modifies the synaptic weights only as long as the current generated by all the stimulated plastic synapses does not match the output desired by the teacher, as in the perceptron learning rule. We describe the implementation of this learning mechanism and present experimental data that demonstrate how the VLSI neural network can learn to classify patterns of neural activities, also in the case in which they are highly correlated.

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Section: Hardware Implementationmentioning

confidence: 99%

Real-Time Classification of Complex Patterns Using Spike-Based Learning in Neuromorphic VLSI

Mitra

Fusi

Indiveri

2009

IEEE Trans. Biomed. Circuits Syst.

193

152

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“…The NE community has recently developed efficient VLSI implementations of such types of computational modules: next to several designs of conductance-based and integrate-and-fire neurons [19,25,38,58,66], NE researchers proposed circuits that implement VLSI dynamic synapses [7], spike-based plasticity mechanisms [32,34,50,68], and soft winner-take-all (WTA) networks [16], for example.VLSI implementations of WTA networks of spiking neurons, with plastic dynamic synapse circuits are particularly important, because recent theoretical studies demonstrated that recurrent neural networks arranged in a way to implement soft WTA performance can implement critical aspects of cortical computation [57].…”

Section: Introductionmentioning

confidence: 99%

Artificial Cognitive Systems: From VLSI Networks of Spiking Neurons to Neuromorphic Cognition

2009

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Neuromorphic engineering (NE) is an emerging research field that has been attempting to identify neural types of computational principles, by implementing biophysically realistic models of neural systems in Very Large Scale Integration (VLSI) technology. Remarkable progress has been made recently, and complex artificial neural sensory-motor systems can be built using this technology. Today, however, NE stands before a large conceptual challenge that must be met before there will be significant progress toward an age of genuinely intelligent neuromorphic machines. The challenge is to bridge the gap from reactive systems to ones that are cognitive in quality. In this paper, we describe recent advancements in NE, and present examples of neuromorphic circuits that can be used as tools to address this challenge. Specifically, we show how VLSI networks of spiking neurons with spike-based plasticity mechanisms and soft winner-take-all architectures represent important building blocks useful for implementing artificial neural systems able to exhibit basic cognitive abilities.

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“…These technical constraints guided us in setting the network parameters of this chip in the CAVIAR system, a multichip spike-based vision system that classifies spatiotemporal trajectories [9], [42], [53], [54].…”

Section: Discussionmentioning

confidence: 99%

Quantification of a Spike-Based Winner-Take-All VLSI Network

Oster

Wang

Douglas

et al. 2008

IEEE Trans. Circuits Syst. I

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Quantification of a spike-based winner-take-all VLSI network Abstract We describe a formalism for quantifying the performance of spike-based winner-take-all (WTA) VLSI chips. The WTA function non-linearly amplifies the output responses of pixels/neurons dependent on the input magnitudes in a decision or selection task. In this work, we show a theoretical description of this winner-take-all computation which takes into consideration the input statistics, neuron response variance, and output rates. This analysis is tested on a spiking VLSI neuronal network fabricated in a 4-metal, 2-poly 0.35\,$\mu$m CMOS process. The measured results of the winner-take-all performance from this chip correspond to the theoretical prediction. This formalism can be applied to any implementation of spike-based neurons. VOL. 55, NO. 10, NOVEMBER 2008 Quantification of a Spike-Based Winner-Take-All VLSI Network Matthias Oster, Yingxue Wang, Member, IEEE, Rodney Douglas, and Shih-Chii Liu, Senior Member, IEEE Abstract-We describe a formalism for quantifying the performance of spike-based winner-take-all (WTA) VLSI chips. The WTA function nonlinearly amplifies the output responses of pixels/neurons dependent on the input magnitudes in a decision or selection task. In this paper, we show a theoretical description of this WTA computation which takes into consideration the input statistics, neuron response variance, and output rates. This analysis is tested on a spiking VLSI neuronal network fabricated in a 4-metal, 2-poly 0.35-m CMOS process. The measured results of the WTA performance from this chip correspond to the theoretical prediction. This formalism can be applied to any implementation of spike-based neurons. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: REGULAR PAPERS,

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Adaptive WTA With an Analog VLSI Neuromorphic Learning Chip

Cited by 59 publications

References 35 publications

Real-Time Classification of Complex Patterns Using Spike-Based Learning in Neuromorphic VLSI

Real-Time Classification of Complex Patterns Using Spike-Based Learning in Neuromorphic VLSI

Artificial Cognitive Systems: From VLSI Networks of Spiking Neurons to Neuromorphic Cognition

Quantification of a Spike-Based Winner-Take-All VLSI Network

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