Adaptive power amplifier linearization by digital pre-distortion using genetic algorithms

Sills, J.A.; Sperlich, R.

doi:10.1109/rawcon.2002.1030159

Cited by 16 publications

(6 citation statements)

References 2 publications

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“…However, prior work on systemlevel DPD optimization has emphasized single-objective optimization of ACPR [1,5]. These works employ a form of search technique called genetic algorithms, which are closely related to evolutionary algorithms, to optimize DPD ACPR performance.…”

Section: Related Workmentioning

confidence: 99%

“…Thus, the objective vector can be formulated as [P FIR ACPR EVM] with units (mW, dBc, %). Here, P FIR is the power consumption, as estimated by the method discussed in in Section 4, and ACPR and EVM are calculated according to (5) and (6), respectively.…”

Section: Problem Encodingmentioning

confidence: 99%

“…In the frequency domain of the transmitted signal, the effects of these impairments are translated as power leakage into adjacent channels. Digital predistortion (DPD) is a widely investigated technique (e.g., see [1][2][3][4][5]) to counteract such impairments by applying carefully-calculated distortion to the signal prior to transmission.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Evolutionary Multiobjective Optimization for Adaptive Dataflow-based Digital Predistortion Architectures

Li¹,

Ghazi²,

Boutellier³

et al. 2017

EAI Endorsed Transactions on Cognitive Communications

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In wireless communication systems, high-power transmitters suffer from nonlinearities due to power amplifier (PA) characteristics, I/Q imbalance, and local oscillator (LO) leakage. Digital Predistortion (DPD) is an effective technique to counteract these impairments. To help maximize agility in cognitive radio systems, it is important to investigate dynamically reconfigurable DPD systems that are adaptive to changes in the employed modulation schemes and operational constraints. To help maximize effectiveness, such reconfiguration should be performed based on multidimensional operational criteria. With this motivation, we develop in this paper a novel evolutionary algorithm framework for multiobjective optimization of DPD systems. We demonstrate our framework by applying it to develop an adaptive DPD architecture, called the adaptive, dataflow-based DPD architecture (ADDA), where Pareto-optimized DPD parameters are derived subject to multidimensional constraints to support efficient predistortion across timevarying operational requirements and modulation schemes. Through extensive simulation results, we demonstrate the effectiveness of our proposed multiobjective optimization framework in deriving efficient DPD configurations for runtime adaptation.

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Section: Related Workmentioning

confidence: 99%

Section: Problem Encodingmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Evolutionary Multiobjective Optimization for Adaptive Dataflow-based Digital Predistortion Architectures

Li¹,

Ghazi²,

Boutellier³

et al. 2017

EAI Endorsed Transactions on Cognitive Communications

View full text Add to dashboard Cite

show abstract

“…The Least Square Error (LSE) formulation allow for a non-iterative solving of problem for costly and complex implementation [7]. However, Least Mean Square (LMS) and Recursive Least Square (RLS) algorithms reduces the implementation complexity by approaching gradually the solution [5,6]. Figure 2 shows the block diagram of the pre-distorter.…”

Section: Principle Of the Adaptive Base Band Dpd Techniquementioning

confidence: 99%

Optimized design of a digital I/Q demodulator suitable for adaptive pre-distortion of 3rd generation base station PAs

Rebai

Ghazel

Boumaiza

et al. 2008

Analog Integr Circ Sig Process

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This article presents an optimized design of a high-speed digital I/Q demodulator intended for the implementation of the feedback path of an adaptive base band digital pre-distorter (DPD). Indeed, the optimization of the DPD linearization capability, in terms of correction bandwidth and nonlinearity effects minimization, is directly related to the accuracy and speed of the I/Q demodulator. In this work, a digital I/Q demodulator is designed, optimized and implemented in a Xilinx FPGA device. This allowed for high-speed processing of about 200 MHz with a substantial reduction in the FPGA used gates.

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“…Piecewise linear approximation [9] enables the application of such higher order polynomials, but degrades the noise floor of the pre-distortion. In a simpler approach, DPD can be easily implemented via LUTs [10][11][12][13]. The LUT stores the pre-distorted AM/AM and AM/PM data of the PA that are mapped to the corresponding inputs.…”

Section: Introductionmentioning

confidence: 99%

A VLSI Design for Digital Pre-distortion with Pipelined CORDIC Processors

Park¹,

Moon²,

Kim³

et al. 2014

JSTS:Journal of Semiconductor Technology and Science

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Abstract-In a wireless communications system, a pre-distorter is often used to compensate for the nonlinear distortions that result from operating a power amplifier near the saturation region, thereby improving system performance and increasing the spectral efficiency for the communication channels. This paper presents a new VLSI design for the polynomial digital pre-distorter (DPD). The proposed DPD uses a Coordinate Rotation Digital Computing (CORDIC) processor and a PD process with a fullypipelined architecture. Due to its simple and regular structure, it can be a competitive design when compared to existing polynomial-type and approximated DPDs. Implementing a fifth-order distorter with the proposed design requires only 43,000 logic gates in a 0.35 μm CMOS standard cell library.

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Adaptive power amplifier linearization by digital pre-distortion using genetic algorithms

Cited by 16 publications

References 2 publications

Evolutionary Multiobjective Optimization for Adaptive Dataflow-based Digital Predistortion Architectures

Evolutionary Multiobjective Optimization for Adaptive Dataflow-based Digital Predistortion Architectures

Optimized design of a digital I/Q demodulator suitable for adaptive pre-distortion of 3rd generation base station PAs

A VLSI Design for Digital Pre-distortion with Pipelined CORDIC Processors

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